SUBSTRATE PROCESSING WITH REDUCED WARPAGE AND/OR CONTROLLED STRAIN
    2.
    发明申请
    SUBSTRATE PROCESSING WITH REDUCED WARPAGE AND/OR CONTROLLED STRAIN 有权
    具有降低的温度和/或控制应变的基板加工

    公开(公告)号:US20130273751A1

    公开(公告)日:2013-10-17

    申请号:US13913045

    申请日:2013-06-07

    Abstract: Provided are systems and methods for processing the surface of substrates that scan a laser beam at one or more selected orientation angles. The orientation angle or angles may be selected to reduce substrate warpage. When the substrates are semiconductor wafers having microelectronic devices, the orientation angles may be selected to produce controlled strain and to improve electronic performance of the devices.

    Abstract translation: 提供了用于处理以一个或多个选定取向角度扫描激光束的基板表面的系统和方法。 可以选择取向角或角度以减少基板翘曲。 当衬底是具有微电子器件的半导体晶片时,可以选择取向角以产生受控应变并改善器件的电子性能。

    SYSTEMS AND PROCESSES FOR FORMING THREE-DIMENSIONAL INTEGRATED CIRCUITS
    3.
    发明申请
    SYSTEMS AND PROCESSES FOR FORMING THREE-DIMENSIONAL INTEGRATED CIRCUITS 审中-公开
    形成三维集成电路的系统和过程

    公开(公告)号:US20160240440A1

    公开(公告)日:2016-08-18

    申请号:US15141783

    申请日:2016-04-28

    Abstract: Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with each other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes.

    Abstract translation: 提供了在基板上形成三维电路的系统和工艺。 辐射源产生被引导到衬底上的光束,该衬底具有介于电路层之间的隔离层。 电路层通过呈现结晶表面的种子区域相互连通。 至少一个电路层具有显示不适于在其中形成电路特征的电子性质的初始微结构。 在可控地热处理之后,具有不合适特性的电路层的初始微结构被转化成具有适于形成电路特性的电子特性的微结构。 还提供了可选地由本发明的系统和/或过程形成的三维电路结构。

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