公开(公告)号：US10856421B2

公开(公告)日：2020-12-01

申请号：US16679337

申请日：2019-11-11

Applicant: Unimicron Technology Corp.

Inventor： Ching-Hao Huang ,  Ho-Shing Lee ,  Yu-Cheng Lin

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/24 ,  H05K3/06 ,  H05K3/28 ,  H05K1/11

Abstract: A circuit board is disposed on a substrate and includes a dielectric layer and a circuit layer. The dielectric layer is disposed on the substrate. The circuit layer is embedded in the dielectric layer and has plural traces. Each of the traces has a first top surface and a first bottom surface which are opposite to each other, and the first bottom surface faces toward the substrate. The first top surface is exposed from the dielectric layer, and an area of a vertical projection of the first top surface on the substrate is smaller than an area of a vertical projection of the first bottom surface on the substrate.

公开(公告)号：US20210289614A1

公开(公告)日：2021-09-16

申请号：US16845069

申请日：2020-04-10

Applicant: Unimicron Technology Corp.

Inventor： Chang-Fu Chen ,  Ho-Shing Lee ,  Chien-Chen Lin

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/46 ,  H05K3/06 ,  H05K1/11

Abstract: A circuit carrier structure includes an inner circuit structure, at least one first circuit layer, and at least one heat dissipating structure. The inner circuit structure has a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface of the inner circuit structure. The heat dissipating structure is disposed in the first circuit layer. The heat dissipating structure includes a first heat dissipating pattern, a second heat dissipating pattern and an interlayer metal layer. The first heat dissipating pattern is embedded in the corresponding first circuit layer. The second heat dissipating pattern is disposed on the first heat dissipating pattern. The interlayer metal layer is disposed between the first heat dissipating pattern and the second heat dissipating pattern. A manufacturing method of the circuit carrier structure is also provided.

公开(公告)号：US11153963B2

公开(公告)日：2021-10-19

申请号：US16845069

申请日：2020-04-10

Applicant: Unimicron Technology Corp.

Inventor： Chang-Fu Chen ,  Ho-Shing Lee ,  Chien-Chen Lin

IPC: H05K1/02 ,  H05K3/00 ,  H05K1/11 ,  H05K3/06 ,  H05K3/46

Abstract: A circuit carrier structure includes an inner circuit structure, at least one first circuit layer, and at least one heat dissipating structure. The inner circuit structure has a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface of the inner circuit structure. The heat dissipating structure is disposed in the first circuit layer. The heat dissipating structure includes a first heat dissipating pattern, a second heat dissipating pattern and an interlayer metal layer. The first heat dissipating pattern is embedded in the corresponding first circuit layer. The second heat dissipating pattern is disposed on the first heat dissipating pattern. The interlayer metal layer is disposed between the first heat dissipating pattern and the second heat dissipating pattern. A manufacturing method of the circuit carrier structure is also provided.

公开(公告)号：US20250149392A1

公开(公告)日：2025-05-08

申请号：US18395755

申请日：2023-12-26

Applicant: Unimicron Technology Corp.

Inventor： Chia Ching Wang ,  Chien-Chou Chen ,  Hsuan Ming Hsu ,  Ho-Shing Lee ,  Yunn-Tzu Yu ,  Yao Yu Chiang ,  Po-Wei Chen ,  Wei-Ti Lin ,  Wen Chi Chang

IPC: H01L23/12 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

Abstract: A package substrate includes a core layer, at least one functional component, at least one spacer, a filler, a first and a second build-up structures. The core layer has at least one opening and multiple conductive through vias. The functional component is disposed in the openings. The spacer is disposed on the functional component. The filler is filled in the opening, covering the functional component and spacer, and completely filling the gap between the opening, the functional component and the spacer. The first build-up structure is disposed on a first surface of the core layer and a third surface of the filler, and electrically connected to the functional component and the conductive through vias. The second build-up structure is disposed on a second surface of the core layer and a fourth surface of the filler, contacts the spacer and electrically connected to the conductive through vias.

公开(公告)号：US10512165B2

公开(公告)日：2019-12-17

申请号：US15468102

申请日：2017-03-23

Applicant: Unimicron Technology Corp.

Inventor： Ching-Hao Huang ,  Ho-Shing Lee ,  Yu-Cheng Lin

IPC: H05K3/00 ,  H05K3/06 ,  H05K3/28

Abstract: A circuit board is disposed on a substrate and includes a dielectric layer and a circuit layer. The dielectric layer is disposed on the substrate. The circuit layer is embedded in the dielectric layer and has plural traces. Each of the traces has a first top surface and a first bottom surface which are opposite to each other, and the first bottom surface faces toward the substrate. The first top surface is exposed from the dielectric layer, and an area of a vertical projection of the first top surface on the substrate is smaller than an area of a vertical projection of the first bottom surface on the substrate.