公开(公告)号：US10998258B2

公开(公告)日：2021-05-04

申请号：US16595491

申请日：2019-10-08

Applicant: Unimicron Technology Corp.

Inventor： Tzu-Hsuan Wang

IPC: H01L23/498 ,  H01L23/13 ,  H01L23/367 ,  H01L21/48

Abstract: A circuit carrier includes a substrate, a laminar circuit structure, a metal heat slug, a first fixing piece, and a second fixing piece. The laminar circuit structure is disposed over the substrate and includes a plurality of dielectric layers and circuits in the dielectric layers. The metal heat slug is disposed in the laminar circuit structure. The first fixing piece is disposed on the first side of the upper surface of the metal heat slug. The second fixing piece is disposed on the second side of the upper surface of the metal heat slug, wherein the first side is perpendicular to the second side. A method of manufacturing a circuit carrier is also provided herein.

公开(公告)号：US20200051885A1

公开(公告)日：2020-02-13

申请号：US16133711

申请日：2018-09-18

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin ,  Tzu-Hsuan Wang

IPC: H01L23/367 ,  H01L21/768 ,  H01L23/538 ,  H01L23/522 ,  H01L23/373

Abstract: A heat dissipation substrate includes an inner circuit structure, a first build-up circuit structure and a heat dissipation channel. The first build-up circuit structure is disposed on the inner circuit structure, and includes an interlayer dielectric layer, a first dielectric layer, a first patterned conductive layer and a plurality of first conductive vias.The first patterned conductive layer and the first dielectric layer are sequentially stacked on the interlayer dielectric layer. The heat dissipation channel is disposed around the chip disposing area on the first build-up circuit structure and has a first opening and a second opening. The first opening penetrates through the first dielectric layer and exposes a portion of the interlayer dielectric layer. The second opening is disposed on a side surface of the first build-up circuit structure. The first opening is in communication with the second opening.

公开(公告)号：US11430768B2

公开(公告)日：2022-08-30

申请号：US17182258

申请日：2021-02-23

Applicant: Unimicron Technology Corp.

Inventor： Tzu-Hsuan Wang ,  Chen-Hsien Liu

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/433 ,  H01L21/56 ,  H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L23/00

Abstract: A chip package structure includes a wiring board, a first chip, a second chip, a thermally conductive material, a molding compound and a heat dissipation part. The wiring board includes a plurality of circuit pads. The first chip is mounted on the wiring board and is electrically connected to at least one of the circuit pads. The first chip is located between the second chip and the wiring board. The thermally conductive material is located on the wiring board and penetrates the second chip and the first chip to extend to the wiring board. The molding compound is disposed on the wiring board, and the heat dissipation part is disposed on the molding material and thermally coupled to the thermally conductive material.

公开(公告)号：US10964634B2

公开(公告)日：2021-03-30

申请号：US16162396

申请日：2018-10-17

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin ,  Tzu-Hsuan Wang ,  Kuan-Wen Fong

IPC: H01L23/498 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532

Abstract: A circuit carrier with embedded substrate includes a circuit structure and an embedded substrate. The circuit structure includes a first dielectric layer, a first patterned circuit layer, a trench, and a plurality of first bumps. The first dielectric layer has a first surface and a second surface opposite to each other. The first patterned circuit layer is embedded in the first surface. The first bumps are disposed on the first surface and electrically connected to the first patterned circuit layer. The trench exposes a portion of the first dielectric layer. The embedded substrate is disposed in the trench and includes a plurality of second bumps. A chip package structure includes the above circuit carrier with embedded substrate.

公开(公告)号：US12253727B2

公开(公告)日：2025-03-18

申请号：US17987770

申请日：2022-11-15

Applicant: Unimicron Technology Corp.

Inventor： Chun-Hung Kuo ,  Tzu-Hsuan Wang

IPC: G02B6/42 ,  G02B6/43 ,  H01L25/16 ,  H04B10/80

Abstract: An electronic device including a light-emitting element, an IC chip, a substrate, an optical waveguide layer, and an optical signal outlet is provided. The IC chip is configured to control the light-emitting element to emit an optical signal. The light-emitting element is disposed on a first surface of the substrate, and the IC chip is disposed on a second surface of the substrate. The optical waveguide layer is disposed on the first surface of the substrate, and the optical waveguide layer includes a core layer, a cladding layer, and a metal layer. The metal layer is disposed on at least a portion of an interface between the core layer and the cladding layer. The optical signal outlet corresponds to the light-emitting element, and the optical signal reaches the optical signal outlet after being transmitted in the core layer.

公开(公告)号：US10943846B2

公开(公告)日：2021-03-09

申请号：US16215671

申请日：2018-12-11

Applicant: Unimicron Technology Corp.

Inventor： Tzu-Hsuan Wang ,  Chien-Chen Lin ,  Kuan-Wen Fong

IPC: H01L23/36 ,  H01L23/367 ,  H01L23/498 ,  H01L23/13 ,  H01L21/48 ,  H01L23/00

Abstract: A chip package structure includes a circuit structure, a redistribution structure, a heat conductive component, a chip, and a heat sink. The circuit structure includes a first circuit layer. The redistribution structure is disposed on the circuit structure and includes a second circuit layer, wherein the redistribution structure has an opening. The heat conductive component is disposed on the circuit structure and covered by the redistribution structure. The heat conductive component has a horizontal portion and a vertical portion. The horizontal portion extends toward the opening until it exceeds the opening. The vertical portion extends upward beyond the top surface of the redistribution structure from a part of the horizontal portion. The chip is disposed in the opening, and the bottom of the chip contacts the heat conductive component. The heat sink is disposed over the redistribution structure and the chip.

公开(公告)号：US20200075469A1

公开(公告)日：2020-03-05

申请号：US16162396

申请日：2018-10-17

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin ,  Tzu-Hsuan Wang ,  Kuan-Wen Fong

IPC: H01L23/498 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532

Abstract: A circuit carrier with embedded substrate includes a circuit structure and an embedded substrate. The circuit structure includes a first dielectric layer, a first patterned circuit layer, a trench, and a plurality of first bumps. The first dielectric layer has a first surface and a second surface opposite to each other. The first patterned circuit layer is embedded in the first surface. The first bumps are disposed on the first surface and electrically connected to the first patterned circuit layer. The trench exposes a portion of the first dielectric layer. The embedded substrate is disposed in the trench and includes a plurality of second bumps. A chip package structure includes the above circuit carrier with embedded substrate.

公开(公告)号：US20230314738A1

公开(公告)日：2023-10-05

申请号：US17987770

申请日：2022-11-15

Applicant: Unimicron Technology Corp.

Inventor： Chun-Hung Kuo ,  Tzu-Hsuan Wang

IPC: G02B6/42 ,  G02B6/43 ,  H01L25/16 ,  H04B10/80

CPC classification number: G02B6/4266 ,  G02B6/43 ,  H01L25/167 ,  H04B10/801

Abstract: An electronic device including a light-emitting element, an IC chip, a substrate, an optical waveguide layer, and an optical signal outlet is provided. The IC chip is configured to control the light-emitting element to emit an optical signal. The light-emitting element is disposed on a first surface of the substrate, and the IC chip is disposed on a second surface of the substrate. The optical waveguide layer is disposed on the first surface of the substrate, and the optical waveguide layer includes a core layer, a cladding layer, and a metal layer. The metal layer is disposed on at least a portion of an interface between the core layer and the cladding layer. The optical signal outlet corresponds to the light-emitting element, and the optical signal reaches the optical signal outlet after being transmitted in the core layer.