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公开(公告)号:US20190243966A1
公开(公告)日:2019-08-08
申请号:US16004191
申请日:2018-06-08
Applicant: VMware, Inc.
Inventor: Michael Wei , Dan Tsafrir , Nadav Amit
IPC: G06F21/54 , G06F12/1009
Abstract: In accordance with embodiments of the present disclosure, a binary translator can perform address shifting on the binary code of an executing application. Address shifting serves to shift the addresses of memory operations that can access locations in the kernel address space into address locations in the user space, thus avoiding speculative access into the kernel address space.
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公开(公告)号:US10824717B2
公开(公告)日:2020-11-03
申请号:US16004191
申请日:2018-06-08
Applicant: VMware, Inc.
Inventor: Michael Wei , Dan Tsafrir , Nadav Amit
Abstract: In accordance with embodiments of the present disclosure, a binary translator can perform address shifting on the binary code of an executing application. Address shifting serves to shift the addresses of memory operations that can access locations in the kernel address space into address locations in the user space, thus avoiding speculative access into the kernel address space.
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公开(公告)号:US11068422B1
公开(公告)日:2021-07-20
申请号:US16804480
申请日:2020-02-28
Applicant: VMware, Inc.
Inventor: Amy Tai , Igor Smolyar , Dan Tsafrir , Michael Wei , Nadav Amit
Abstract: Described herein are embodiments that adaptively reduce the number of interrupts that occur between a device controller and a computer system. Device commands are submitted to the controller by an operating system on behalf of an application. The device performs the received commands and indicates command completions to the controller. A counter counts completions, and if the count exceeds a threshold number, the controller generates an interrupt to the computer system. If the count is greater than zero and the timeout interval has expired, then the controller generates an interrupt to the computer system. In some embodiments, the application attaches flags to one of the commands indicating that an interrupt relating to completion of the flagged command should be generated as soon as possible or that an interrupt relating to completion of all commands prior to and including the flagged command should be generated as soon as possible.
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4.
公开(公告)号:US20190243776A1
公开(公告)日:2019-08-08
申请号:US15960467
申请日:2018-04-23
Applicant: VMware, Inc.
Inventor: Nadav Amit , Dan Tsafrir , Michael Wei
IPC: G06F12/1009 , G06F12/14 , G06F21/57
Abstract: Embodiments are disclosed to mitigate the meltdown vulnerability by selectively using page table isolation. Page table isolation is enabled for 64-bit applications, so that unprivileged areas in the kernel address space cannot be accessed in user mode due to speculative execution by the processor. On the other hand, page table isolation is disabled for 32-bit applications thereby providing mapping into unprivileged areas in the kernel address space. However, speculative execution is limited to a 32-bit address space in a 32-bit application, and s access to unprivileged areas in the kernel address space can be inhibited.
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公开(公告)号:US10713353B2
公开(公告)日:2020-07-14
申请号:US16016254
申请日:2018-06-22
Applicant: VMware, Inc.
Inventor: Michael Wei , Dan Tsafrir , Nadav Amit
Abstract: The present disclosure addresses the meltdown vulnerability resulting from speculative execution in a multi-core processing system. The operating system (OS) can be loaded for execution on one of several processing cores (OS core), while an application can be loaded for execution on another of the processing cores (application core). The OS core uses process page tables that map the entire kernel address space to physical memory. Conversely, the application core uses pages tables that map only a portion of the kernel address space to physical memory.
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公开(公告)号:US10599835B2
公开(公告)日:2020-03-24
申请号:US15960467
申请日:2018-04-23
Applicant: VMware, Inc.
Inventor: Nadav Amit , Dan Tsafrir , Michael Wei
Abstract: Embodiments are disclosed to mitigate the meltdown vulnerability by selectively using page table isolation. Page table isolation is enabled for 64-bit applications, so that unprivileged areas in the kernel address space cannot be accessed in user mode due to speculative execution by the processor. On the other hand, page table isolation is disabled for 32-bit applications thereby providing mapping into unprivileged areas in the kernel address space. However, speculative execution is limited to a 32-bit address space in a 32-bit application, and s access to unprivileged areas in the kernel address space can be inhibited.
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公开(公告)号:US20190243990A1
公开(公告)日:2019-08-08
申请号:US16016254
申请日:2018-06-22
Applicant: VMware, Inc.
Inventor: Michael Wei , Dan Tsafrir , Nadav Amit
Abstract: The present disclosure addresses the meltdown vulnerability resulting from speculative execution in a multi-core processing system. The operating system (OS) can be loaded for execution on one of several processing cores (OS core), while an application can be loaded for execution on another of the processing cores (application core). The OS core uses process page tables that map the entire kernel address space to physical memory. Conversely, the application core uses pages tables that map only a portion of the kernel address space to physical memory.
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公开(公告)号:US20190243965A1
公开(公告)日:2019-08-08
申请号:US16004180
申请日:2018-06-08
Applicant: VMware, Inc.
Inventor: Michael Wei , Dan Tsafrir , Nadav Amit
IPC: G06F21/54 , G06F12/1009
CPC classification number: G06F12/1009 , G06F12/1441 , G06F21/52 , G06F21/54 , G06F21/577 , G06F21/74 , G06F2212/1044 , G06F2212/1052 , G06F2212/657 , G06F2221/034
Abstract: In accordance with embodiments of the present disclosure, a compiler can compile source code to produce binary code that includes address shifting code inserted with memory operations. The address shifting code can shift addresses of memory operations that access locations in the kernel address space into address locations in the user space, thus avoiding speculative access into the kernel address space.
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