公开(公告)号：US11908495B2

公开(公告)日：2024-02-20

申请号：US17725764

申请日：2022-04-21

Applicant: Western Digital Technologies, Inc.

Inventor： Bo Yang ,  Yuhang Yang ,  Ning Ye

IPC: G11B33/14 ,  G11B33/12

CPC classification number: G11B33/1406 ,  G11B33/124 ,  G11B2220/2516

Abstract: Disclosed herein is an electronic device that includes a pedestal that extends from a mounting surface of a base of the electronic device. The electronic device also includes a thermal interface material that is interposed between an interface surface of the pedestal and a data processing component, is in direct contact with the data processing component, and is in direct contact with a first portion and a second portion of the interface surface. The first portion of the interface surface of the pedestal has a first height, relative to the mounting surface of the base, and the second portion of the interface surface of the pedestal has a second height, relative to the mounting surface of the base and different than the first height.

公开(公告)号：US20210384099A1

公开(公告)日：2021-12-09

申请号：US16894068

申请日：2020-06-05

Applicant: Western Digital Technologies, Inc.

Inventor： Bo Yang ,  Chun Sean Lau ,  Ning Ye ,  Shrikar Bhagath

IPC: H01L23/367 ,  H01L23/42

Abstract: A packaged semiconductor device includes a substrate, a heat-generating component positioned on a surface of the substrate, an enclosure at least partially surrounding the substrate and the heat-generating component, and a thermal interface material disposed between the heat-generating component and the enclosure. The enclosure includes a cover portion having a convexly curved surface configured to apply a pressure to the thermal interface material. The pressure may be substantially uniform over the area of the thermal interface material, or may be higher at a center of the thermal interface material than at a periphery of the thermal interface material.

公开(公告)号：US11985782B2

公开(公告)日：2024-05-14

申请号：US17658443

申请日：2022-04-08

Applicant: Western Digital Technologies, Inc.

Inventor： Bo Yang ,  Warren Middlekauff ,  Sean Lau ,  Ning Ye ,  Shrikar Bhagath ,  Yangming Liu

IPC: H05K7/14 ,  H05K5/00

CPC classification number: H05K7/1427 ,  H05K5/0008 ,  H05K7/1417

Abstract: A data storage device includes an enclosure and a Printed Circuit Board Assembly (PCBA) extending in a basal plane, and a plurality of semiconductor memory packages electromechanically bonded to the PCBA and coupled to the enclosure with thermal interface material. The data storage device further includes a first fitting coupled to a first end of the PCBA and the enclosure, restricting movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane. The data storage device further includes a second fitting coupled to a second end of the PCBA, allowing movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane.

公开(公告)号：US11961778B2

公开(公告)日：2024-04-16

申请号：US17486322

申请日：2021-09-27

Applicant: Western Digital Technologies, Inc.

Inventor： Shenghua Huang ,  Yangming Liu ,  Bo Yang ,  Ning Ye

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/29 ,  H01L23/552 ,  H01L25/065

CPC classification number: H01L23/3135 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/48225 ,  H01L2924/3862

Abstract: A semiconductor device package includes a substrate having a top planar surface and a first semiconductor die electrically connected to the top planar surface of the substrate. The first semiconductor die and substrate define a tunnel and a first molding compound encapsulates the first semiconductor die and fills the tunnel. A second molding compound that is separate and distinct from the first molding compound is mounted on a top surface of the first molding compound. The first molding, when in a flowable state, has a viscosity that is lower than a viscosity of the second molding compound when it is in a flowable state.

公开(公告)号：US20230328910A1

公开(公告)日：2023-10-12

申请号：US17658443

申请日：2022-04-08

Applicant: Western Digital Technologies, Inc.

Inventor： Bo Yang ,  Warren Middlekauff ,  Sean Lau ,  Ning Ye ,  Shrikar Bhagath ,  Yangming Liu

IPC: H05K7/14 ,  H05K5/00

CPC classification number: H05K7/1427 ,  H05K5/0008 ,  H05K7/1417

Abstract: A data storage device includes an enclosure and a Printed Circuit Board Assembly (PCBA) extending in a basal plane, and a plurality of semiconductor memory packages electromechanically bonded to the PCBA and coupled to the enclosure with thermal interface material. The data storage device further includes a first fitting coupled to a first end of the PCBA and the enclosure, restricting movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane. The data storage device further includes a second fitting coupled to a second end of the PCBA, allowing movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane.

公开(公告)号：US11177242B2

公开(公告)日：2021-11-16

申请号：US16814812

申请日：2020-03-10

Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.

Inventor： Yangming Liu ,  Ning Ye ,  Bo Yang

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor device is disclosed including one or more semiconductor dies mounted on substrate. Each semiconductor die may be formed with a ferromagnetic layer on a lower, inactive surface of the semiconductor die. The ferromagnetic layer pulls the semiconductor dies down against each other and the substrate during fabrication to prevent warping of the dies. The ferromagnetic layer also balances out a mismatch of coefficients of thermal expansion between layers of the dies, thus further preventing warping of the dies.

公开(公告)号：US20240249950A1

公开(公告)日：2024-07-25

申请号：US18449452

申请日：2023-08-14

Applicant: Western Digital Technologies, Inc.

Inventor： Yangming Liu ,  Bo Yang ,  Ning Ye

IPC: H01L21/3065 ,  H01L21/82 ,  H01L23/00

CPC classification number: H01L21/3065 ,  H01L21/82 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13005 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/8121 ,  H01L2924/20641

Abstract: Approaches directed at increasing the production yield of integrated circuits including layers of low-k dielectrics. One example provides a flip-chip assembly including a semiconductor chip attached to a substrate using pillars or bumps. The semiconductor chip has a thickness profile such that the chip is thinner near the corners than in middle portions. The thinner corner portions beneficially alleviate chip-integrity issues related to the stresses generated during the solder reflow operation while the thicker middle portions beneficially alleviate chip-integrity issues related to the stresses generated during the chip or die pick-up operation. Due to the alleviation of both types of chip-integrity issues, the number of instances in which the low-k dielectrics crack during the corresponding assembly operations is significantly reduced, thereby beneficially increasing the manufacturing yield.

公开(公告)号：US12033958B2

公开(公告)日：2024-07-09

申请号：US17536800

申请日：2021-11-29

Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.

Inventor： Yangming Liu ,  Shenghua Huang ,  Bo Yang ,  Ning Ye ,  Cong Zhang

IPC: H01L23/00 ,  H01L23/552 ,  H01L25/065

CPC classification number: H01L23/562 ,  H01L23/552 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/3511

Abstract: A semiconductor device includes a substrate, semiconductor dies on the substrate, molding compound and a reinforcing layer suspended within the molding compound. The reinforcing layer may for example be a copper foil formed in the molding compound over the semiconductor dies during the compression molding process. The reinforcing layer may have a structural rigidity which provides additional strength to the semiconductor device. The reinforcing layer may also be formed of a thermal conductor to draw heat away from a controller die within the semiconductor device.

公开(公告)号：US12016111B2

公开(公告)日：2024-06-18

申请号：US17724689

申请日：2022-04-20

Applicant: Western Digital Technologies, Inc.

Inventor： Chun Sean Lau ,  Ahmad Faridzul Hilmi Shamsuddin ,  Bo Yang ,  Shankara Venkatraman Gopalan ,  Warren Middlekauff ,  Ning Ye

IPC: H05K1/02 ,  B23K1/00 ,  H05K3/30 ,  H05K5/00 ,  B23K101/42

CPC classification number: H05K1/0204 ,  B23K1/0008 ,  H05K3/303 ,  H05K5/0047 ,  B23K2101/42

Abstract: A protective enclosure for a PCB assembly, e.g., a solid-state-drive assembly. In an example embodiment, the enclosure comprises a flexible, stamped-metal heat spreader connected, by way of cured-liquid TIM parts, to at least some of the packaged integrated circuits on one side of the PCB assembly. In some embodiments, additional cured-liquid TIM parts may be connected between the body of the protective enclosure and packaged integrated circuits on the other side of the PCB assembly and/or the assembly's PCB. The PCB assembly, heat spreader, and various TIM parts are arranged in a manner that helps to significantly lower the risk of solder-joint failure under thermal cycling.

公开(公告)号：US20230395446A1

公开(公告)日：2023-12-07

申请号：US17829719

申请日：2022-06-01

Applicant: Western Digital Technologies, Inc.

Inventor： Yangming Liu ,  Shenghua Huang ,  Bo Yang ,  Ning Ye

IPC: H01L23/24 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L23/24 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/0652 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2924/37001 ,  H01L2924/1438 ,  H01L2224/48148 ,  H01L2224/48229 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06593

Abstract: A semiconductor device including one or more support structures for supporting a semiconductor-die stack having a region that overhangs a substrate. In an example embodiment, the support structures may be implemented using suitably shaped pieces of relatively thick round or ribbon wire attached to metal pads on the substrate. During the encapsulation operation, the one or more support structures may counteract a bending force applied to the semiconductor-die stack by a flow of the molding compound. At least some embodiments may beneficially be used, e.g., to enable high-yield fabrication of devices having sixteen or more stacked memory dies.