公开(公告)号：US20220406726A1

公开(公告)日：2022-12-22

申请号：US17354119

申请日：2021-06-22

Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.

Inventor： Jiandi Du ,  Binbin Zheng ,  Rui Guo ,  Chin-Tien Chiu ,  Zengyu Zhou ,  Fen Yu

IPC: H01L23/552 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L23/498 ,  H01L25/00

Abstract: A semiconductor device has shielding to prevent transmission and/or reception of EMI and/or RFI radiation. The semiconductor device comprises a substrate including grounded contact pads around a periphery of the substrate, exposed at one or more edges of the substrate. A bump made of gold or other non-oxidizing conductive material may be formed on the contact pads, for example using ultrasonic welding to remove an oxidation layer between the contact pads and the conductive bumps. The conductive bumps electrically couple to a conductive coating applied around the periphery of the semiconductor device.

公开(公告)号：US20230402361A1

公开(公告)日：2023-12-14

申请号：US17840322

申请日：2022-06-14

Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.

Inventor： Shenghua Huang ,  Binbin Zheng ,  Shaopeng Dong ,  Songtao Lu ,  Rui Guo ,  Yangming Liu ,  Bo Yang ,  Ning Ye

IPC: H01L23/498 ,  H01L23/12 ,  H01L23/31 ,  H01L25/065 ,  G06K19/077 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/12 ,  H01L23/3107 ,  H01L25/0657 ,  G06K19/07732 ,  H01L24/48 ,  H01L2225/06562 ,  H01L2924/3512 ,  H01L2924/1511 ,  H01L2224/48135

Abstract: A semiconductor device includes a substrate, semiconductor dies on the substrate, molding compound and reinforcing blocks on the substrate. The reinforcing blocks may be provided at positions on the substrate where mechanical stresses develop in the device during singulation, such as at curves and/or discontinuous points around the outline of the substrate, to add strength to the substrate.

公开(公告)号：US11784135B2

公开(公告)日：2023-10-10

申请号：US17354119

申请日：2021-06-22

Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.

Inventor： Jiandi Du ,  Binbin Zheng ,  Rui Guo ,  Chin-Tien Chiu ,  Zengyu Zhou ,  Fen Yu

IPC: H01L23/552 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L23/498 ,  H01L25/00

CPC classification number: H01L23/552 ,  H01L23/49838 ,  H01L24/13 ,  H01L25/0652 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/1357 ,  H01L2224/13144 ,  H01L2224/13647 ,  H01L2225/06506 ,  H01L2225/06537 ,  H01L2225/06562 ,  H01L2225/06582 ,  H01L2924/3025

Abstract: A semiconductor device has shielding to prevent transmission and/or reception of EMI and/or RFI radiation. The semiconductor device comprises a substrate including grounded contact pads around a periphery of the substrate, exposed at one or more edges of the substrate. A bump made of gold or other non-oxidizing conductive material may be formed on the contact pads, for example using ultrasonic welding to remove an oxidation layer between the contact pads and the conductive bumps. The conductive bumps electrically couple to a conductive coating applied around the periphery of the semiconductor device.

公开(公告)号：US20230129628A1

公开(公告)日：2023-04-27

申请号：US17510212

申请日：2021-10-25

Applicant: Western Digital Technologies, Inc.

Inventor： Simon Dong ,  Hope Chiu ,  Weiting Jiang ,  Elley Zhang ,  Kent Yang ,  Hua Tan ,  Jerry Tang ,  Rui Guo

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/538

Abstract: A semiconductor device package includes a multi-layer substrate including a bottom layer and a top layer. One or more dies are mounted on and electrically coupled to the top layer of the substrate. An electromagnetic interference (EMI) shield encapsulates the substrate and the semiconductor dies. A first plurality of conductive stubs is positioned around edges of the top layer of the substrate. Each of the conductive stubs includes an edge portion having a first thickness and in contact with the EMI shield. A second plurality of conductive stubs is positioned around edges of the bottom layer of the substrate. Each of the second plurality of conductive stubs includes an edge portion having a second thickness less than the first thickness and in contact with the EMI shield.

公开(公告)号：US20200006212A1

公开(公告)日：2020-01-02

申请号：US16277244

申请日：2019-02-15

Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.

Inventor： Rui Guo ,  Songtao Lu ,  Shenghua Huang ,  Ting Liu ,  Chin-Tien Chiu

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L21/48

Abstract: A substrate is disclosed having a stress relief layer. The stress relief layer may be applied to a dielectric core of the substrate, beneath a conductive layer in which electrical traces and contact pads are formed. The substrate including the stress relief layer may be incorporated into a semiconductor product which may, for example, be mounted on a host printed circuit board using solder balls on a surface of the substrate. The stress relief layer helps dissipate stresses within the substrate and improves the board level reliability.