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公开(公告)号:US20200006184A1
公开(公告)日:2020-01-02
申请号:US16277180
申请日:2019-02-15
Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
Inventor: Yangming Liu , Ning Ye , Chin-Tien Chiu
IPC: H01L23/32 , H01L23/00 , H01L25/065 , H01L25/00
Abstract: A semiconductor device is disclosed having reinforced supports at corners of the device. The semiconductor device may include solder balls on a lower surface of the device for soldering the device onto a printed circuit board. In one example, the solder balls at the corners of the semiconductor device may be replaced by support billets having more mass and more contact area between the semiconductor device and the PCB. In a further example, screws may be provided at the corners of the device (instead of the corner solder balls or in addition to the corner solder balls). These screws may be placed through the corners of the semiconductor device and into the printed circuit board.
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公开(公告)号:US20230402361A1
公开(公告)日:2023-12-14
申请号:US17840322
申请日:2022-06-14
Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
Inventor: Shenghua Huang , Binbin Zheng , Shaopeng Dong , Songtao Lu , Rui Guo , Yangming Liu , Bo Yang , Ning Ye
IPC: H01L23/498 , H01L23/12 , H01L23/31 , H01L25/065 , G06K19/077 , H01L23/00
CPC classification number: H01L23/49838 , H01L23/12 , H01L23/3107 , H01L25/0657 , G06K19/07732 , H01L24/48 , H01L2225/06562 , H01L2924/3512 , H01L2924/1511 , H01L2224/48135
Abstract: A semiconductor device includes a substrate, semiconductor dies on the substrate, molding compound and reinforcing blocks on the substrate. The reinforcing blocks may be provided at positions on the substrate where mechanical stresses develop in the device during singulation, such as at curves and/or discontinuous points around the outline of the substrate, to add strength to the substrate.
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公开(公告)号:US20230170312A1
公开(公告)日:2023-06-01
申请号:US17536800
申请日:2021-11-29
Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
Inventor: Yangming Liu , Shenghua Huang , Bo Yang , Ning Ye , Cong Zhang
IPC: H01L23/00 , H01L25/065 , H01L23/552
CPC classification number: H01L23/562 , H01L24/48 , H01L25/0657 , H01L23/552 , H01L25/0652 , H01L2224/48145 , H01L2224/48225 , H01L2225/06562 , H01L2225/06506 , H01L2225/0651 , H01L2924/3511
Abstract: A semiconductor device includes a substrate, semiconductor dies on the substrate, molding compound and a reinforcing layer suspended within the molding compound. The reinforcing layer may for example be a copper foil formed in the molding compound over the semiconductor dies during the compression molding process. The reinforcing layer may have a structural rigidity which provides additional strength to the semiconductor device. The reinforcing layer may also be formed of a thermal conductor to draw heat away from a controller die within the semiconductor device.
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公开(公告)号:US20240304518A1
公开(公告)日:2024-09-12
申请号:US18357341
申请日:2023-07-24
Applicant: Western Digital Technologies, Inc.
Inventor: Yangming Liu , Bo Yang , Ning Ye
IPC: H01L23/473 , H01L23/04 , H01L23/42
CPC classification number: H01L23/473 , H01L23/04 , H01L23/42 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204
Abstract: A semiconductor package includes a flip chip die communicatively coupled to a substrate. A lid is also coupled to the substrate and covers the flip chip die. A non-curing thermal conductive liquid coolant fills a volume defined by the lid and is used to dissipate heat that is generated by the flip chip die. The non-curing thermal conductive liquid coolant may include nanometer-sized particles that enhance the heat dissipation properties of the non-curing thermal conductive liquid coolant. The semiconductor package also may include a micro-rotator that causes the non-curing thermal conductive liquid coolant to circulate within the volume when a temperature of the flip chip die exceeds a temperature threshold.
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公开(公告)号:US11978713B2
公开(公告)日:2024-05-07
申请号:US17750047
申请日:2022-05-20
Applicant: Western Digital Technologies, Inc.
Inventor: Shenghua Huang , Yangming Liu , Bo Yang , Ning Ye
IPC: H01L23/00
CPC classification number: H01L24/13 , H01L2224/13147 , H01L2224/16225 , H01L2924/01029
Abstract: The present disclosure generally relates to a flip chip assembly having a bump that reduces stress levels in a low-k dielectric layer in the flip chip. Rather than having a single, large area plateau that interfaces with a large corresponding opening of an insulating layer in the flip chip, the bump includes a plurality of much smaller pillars that interface with a corresponding plurality of openings in the insulating layer. In so doing, the low-k layer within the flip chip experiences much less stress and hence, fewer failures.
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公开(公告)号:US11985782B2
公开(公告)日:2024-05-14
申请号:US17658443
申请日:2022-04-08
Applicant: Western Digital Technologies, Inc.
Inventor: Bo Yang , Warren Middlekauff , Sean Lau , Ning Ye , Shrikar Bhagath , Yangming Liu
CPC classification number: H05K7/1427 , H05K5/0008 , H05K7/1417
Abstract: A data storage device includes an enclosure and a Printed Circuit Board Assembly (PCBA) extending in a basal plane, and a plurality of semiconductor memory packages electromechanically bonded to the PCBA and coupled to the enclosure with thermal interface material. The data storage device further includes a first fitting coupled to a first end of the PCBA and the enclosure, restricting movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane. The data storage device further includes a second fitting coupled to a second end of the PCBA, allowing movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane.
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公开(公告)号:US11961778B2
公开(公告)日:2024-04-16
申请号:US17486322
申请日:2021-09-27
Applicant: Western Digital Technologies, Inc.
Inventor: Shenghua Huang , Yangming Liu , Bo Yang , Ning Ye
IPC: H01L23/31 , H01L23/00 , H01L23/29 , H01L23/552 , H01L25/065
CPC classification number: H01L23/3135 , H01L23/295 , H01L23/3121 , H01L23/552 , H01L24/48 , H01L25/0657 , H01L2224/48225 , H01L2924/3862
Abstract: A semiconductor device package includes a substrate having a top planar surface and a first semiconductor die electrically connected to the top planar surface of the substrate. The first semiconductor die and substrate define a tunnel and a first molding compound encapsulates the first semiconductor die and fills the tunnel. A second molding compound that is separate and distinct from the first molding compound is mounted on a top surface of the first molding compound. The first molding, when in a flowable state, has a viscosity that is lower than a viscosity of the second molding compound when it is in a flowable state.
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公开(公告)号:US20230328910A1
公开(公告)日:2023-10-12
申请号:US17658443
申请日:2022-04-08
Applicant: Western Digital Technologies, Inc.
Inventor: Bo Yang , Warren Middlekauff , Sean Lau , Ning Ye , Shrikar Bhagath , Yangming Liu
CPC classification number: H05K7/1427 , H05K5/0008 , H05K7/1417
Abstract: A data storage device includes an enclosure and a Printed Circuit Board Assembly (PCBA) extending in a basal plane, and a plurality of semiconductor memory packages electromechanically bonded to the PCBA and coupled to the enclosure with thermal interface material. The data storage device further includes a first fitting coupled to a first end of the PCBA and the enclosure, restricting movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane. The data storage device further includes a second fitting coupled to a second end of the PCBA, allowing movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane.
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公开(公告)号:US11177242B2
公开(公告)日:2021-11-16
申请号:US16814812
申请日:2020-03-10
Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
Inventor: Yangming Liu , Ning Ye , Bo Yang
IPC: H01L25/065 , H01L23/31 , H01L23/00
Abstract: A semiconductor device is disclosed including one or more semiconductor dies mounted on substrate. Each semiconductor die may be formed with a ferromagnetic layer on a lower, inactive surface of the semiconductor die. The ferromagnetic layer pulls the semiconductor dies down against each other and the substrate during fabrication to prevent warping of the dies. The ferromagnetic layer also balances out a mismatch of coefficients of thermal expansion between layers of the dies, thus further preventing warping of the dies.
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公开(公告)号:US20250079400A1
公开(公告)日:2025-03-06
申请号:US18456906
申请日:2023-08-28
Applicant: Western Digital Technologies, Inc.
Inventor: Yangming Liu , ZiJing Yu , Feng Zhu , Jing He , Hengxu Yu
IPC: H01L25/065 , H01L21/78 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/538 , H01L25/00 , H10B80/00
Abstract: An unsingulated semiconductor package includes multiple integrated circuits provided on a single substrate segment and encapsulated by a single cover. The unsingulated semiconductor package is mounted on a PCB of a computing component to increase the capacity and performance capabilities of the computing component without occupying additional space on the PCB.
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