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    Resistive RAM and method of manufacturing the same
    2.
    发明授权
    Resistive RAM and method of manufacturing the same 有权
    电阻RAM及其制造方法

    公开(公告)号：US09224947B1

    公开(公告)日：2015-12-29

    申请号：US14492096

    申请日：2014-09-22

    Applicant: Winbond Electronics Corp.

    Inventor： Shuo-Che Chang ,  Sung-Ying Wen

    IPC: H01L27/115 ,  H01L45/00 ,  H01L27/11 ,  H01L49/02

    CPC classification number: H01L45/1253 ,  H01L27/1112 ,  H01L28/24 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

    Abstract: A resistive RAM and a method of manufacturing the same are provided. The resistive RAM includes a first electrode, a second electrode, a transition metal oxide (TMO) layer between the first and second electrodes, an activated metal layer between the first electrode and the TMO layer, and a metal oxynitride layer formed on a surface of the activated metal layer in the gas environment containing oxygen and nitrogen elements.

    Abstract translation: 提供了电阻式RAM及其制造方法。 电阻RAM包括在第一和第二电极之间的第一电极，第二电极，过渡金属氧化物（TMO）层，在第一电极和TMO层之间的活化金属层和形成在第一电极和第二电极的表面上的金属氧氮化物层 活性金属层在气体环境中含有氧和氮元素。

    RESISTIVE RANDOM ACCESS MEMORY
    4.
    发明申请
    RESISTIVE RANDOM ACCESS MEMORY 审中-公开
    电阻随机存取存储器

    公开(公告)号：US20160087198A1

    公开(公告)日：2016-03-24

    申请号：US14830742

    申请日：2015-08-20

    Applicant: Winbond Electronics Corp.

    Inventor： Shuo-Che Chang

    IPC: H01L45/00

    CPC classification number: H01L45/1253 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

    Abstract: A resistive random access memory (RRAM) includes a top electrode (TE), a bottom electrode (BE), and a transition metal oxide (TMO) layer between the top and the bottom electrodes. The RRAM further includes a metal cap layer above the top electrode and a transparent metal oxide (TCO) layer between the metal cap layer and the top electrode.

    Abstract translation: 电阻随机存取存储器（RRAM）包括在顶部和底部电极之间的顶部电极（TE），底部电极（BE）和过渡金属氧化物（TMO）层。 RRAM还包括在顶部电极上方的金属盖层和金属覆盖层和顶部电极之间的透明金属氧化物（TCO）层。

    Method of wafer dicing and die
    5.
    发明授权
    Method of wafer dicing and die 有权

    公开(公告)号：US10685883B1

    公开(公告)日：2020-06-16

    申请号：US16402216

    申请日：2019-05-02

    Applicant: Winbond Electronics Corp.

    Inventor： Cheng-Hong Wei ,  Hung-Sheng Chen ,  Ching-Wei Chen ,  Shuo-Che Chang

    IPC: H01L21/78 ,  H01L23/544 ,  H01L23/00 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/66

    Abstract: A method of wafer dicing and a die are provided. The method includes the following processes. A wafer is provided, the wafer includes a plurality of die regions and a scribe region between the die regions. The scribe region includes a substrate, and a dielectric layer and a test structure on the substrate, the test structure is disposed in the dielectric layer. A first removal process is performed to remove the test structure and the dielectric layer around the test structure, so as to expose the substrate. The first removal process includes performing a plurality of etching cycles, and each etching cycle includes performing a first etching process to remove a portion of the test structure and performing a second etching process to remove a portion of the dielectric layer. A second removal process is performed to remove the substrate in the scribe region, so as to form a plurality of dies separated from each other.

    Structure and formation method of memory device
    6.
    发明授权
    Structure and formation method of memory device 有权
    存储器件的结构和形成方法

    公开(公告)号：US09356235B2

    公开(公告)日：2016-05-31

    申请号：US14474931

    申请日：2014-09-02

    Applicant: Winbond Electronics Corp.

    Inventor： Po-Yen Hsu ,  Hsiu-Han Liao ,  Shuo-Che Chang ,  Chia Hua Ho

    IPC: H01L45/00

    CPC classification number: H01L45/146 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616 ,  H01L45/1641

    Abstract: Structures and formation methods of memory devices are provided. The memory device includes a first electrode, a second electrode, and a resistive layer positioned between the first electrode and the second electrode. The resistive layer has a crystalline portion. A volume ratio of the crystalline portion to the resistive layer is in a range from about 0.2 to about 1.

    Abstract translation: 提供了存储器件的结构和形成方法。 存储器件包括位于第一电极和第二电极之间的第一电极，第二电极和电阻层。 电阻层具有结晶部分。 结晶部分与电阻层的体积比在约0.2至约1的范围内。

    Resistive random access memory
    8.
    发明授权
    Resistive random access memory 有权

    公开(公告)号：US10305033B2

    公开(公告)日：2019-05-28

    申请号：US14830742

    申请日：2015-08-20

    Applicant: Winbond Electronics Corp.

    Inventor： Shuo-Che Chang

    IPC: H01L45/00

    Abstract: A resistive random access memory (RRAM) includes a top electrode (TE), a bottom electrode (BE), and a transition metal oxide (TMO) layer between the top and the bottom electrodes. The RRAM further includes a metal cap layer above the top electrode and a transparent metal oxide (TCO) layer between the metal cap layer and the top electrode.

    RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME
    9.
    发明申请
    RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME 有权
    电阻随机存取存储器及其制作方法

    公开(公告)号：US20150287915A1

    公开(公告)日：2015-10-08

    申请号：US14476748

    申请日：2014-09-04

    Applicant: Winbond Electronics Corp.

    Inventor： Shuo-Che Chang ,  Chia-Hua Ho

    IPC: H01L45/00

    CPC classification number: H01L45/146 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1608

    Abstract: A resistive random access memory includes a first electrode layer, a second electrode layer, and a stacked structure disposed between the first electrode layer and the second electrode layer. The stacked structure includes a conductive layer and a resistance variable layer. The material of the conductive layer includes HfOx, the material of the resistance variable layer includes HfOy, and x

    Abstract translation: 电阻式随机存取存储器包括第一电极层，第二电极层和布置在第一电极层和第二电极层之间的堆叠结构。 层叠结构包括导电层和电阻变化层。 导电层的材料包括HfO x，电阻变化层的材料包括HfOy和x

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