公开(公告)号：US11469259B2

公开(公告)日：2022-10-11

申请号：US17167945

申请日：2021-02-04

Applicant: X Display Company Technology Limited

Inventor： Christopher Bower ,  Etienne Menard ,  Matthew Meitl ,  Joseph Carr

IPC: H01L29/04 ,  H01L27/12 ,  H01L21/84 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/768 ,  H01L29/786

Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.

公开(公告)号：US20210167100A1

公开(公告)日：2021-06-03

申请号：US17167945

申请日：2021-02-04

Applicant: X Display Company Technology Limited

Inventor： Christopher Bower ,  Etienne Menard ,  Matthew Meitl ,  Joseph Carr

IPC: H01L27/12 ,  H01L21/84 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/768 ,  H01L29/786

Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.

公开(公告)号：US10943931B2

公开(公告)日：2021-03-09

申请号：US16697104

申请日：2019-11-26

Applicant: X Display Company Technology Limited

Inventor： Christopher Bower ,  Etienne Menard ,  Matthew Meitl ,  Joseph Carr

IPC: H01L29/04 ,  H01L27/12 ,  H01L21/84 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/768 ,  H01L29/786

Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.