公开(公告)号：US11839083B2

公开(公告)日：2023-12-05

申请号：US17451884

申请日：2021-10-22

Applicant: Yangtze Memory Technologies Co., Ltd.

Inventor： Yingjie Ouyang ,  Zhiliang Xia ,  Lei Jin ,  Qiguang Wang ,  Wenxi Zhou ,  Zhongwang Sun ,  Rui Su ,  Yueqiang Pu ,  Jiwei Cheng

IPC: H10B43/27 ,  G11C5/06 ,  H01L23/522 ,  H01L23/528 ,  H10B43/10 ,  H10B43/35

CPC classification number: H10B43/27 ,  G11C5/063 ,  H01L23/5226 ,  H01L23/5283 ,  H10B43/10 ,  H10B43/35

Abstract: In a method for forming a semiconductor device, a channel structure is formed that extends from a side of a substrate, where the channel structure includes sidewalls and a bottom region. The channel structure further includes a bottom channel contact that is positioned at the bottom region and a channel layer that is formed along the sidewalls and over the bottom channel contact. A high-k layer is formed over the channel layer along the sidewalls of the channel structure and over the bottom channel contact.

公开(公告)号：US11910599B2

公开(公告)日：2024-02-20

申请号：US17993600

申请日：2022-11-23

Applicant: Yangtze Memory Technologies Co., Ltd.

Inventor： Zhongwang Sun ,  Guangji Li ,  Kun Zhang ,  Ming Hu ,  Jiwei Cheng ,  Shijin Luo ,  Kun Bao ,  Zhiliang Xia

IPC: H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B41/41 ,  H10B43/35 ,  H10B43/40

CPC classification number: H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

Abstract: Embodiments of contact structures of a three-dimensional memory device and fabrication method thereof are disclosed. The three-dimensional memory structure includes a film stack disposed on a substrate, wherein the film stack includes a plurality of conductive and dielectric layer pairs, each conductive and dielectric layer pair having a conductive layer and a first dielectric layer. The three-dimensional memory structure also includes a staircase structure formed in the film stack, wherein the staircase structure includes a plurality of steps, each staircase step having two or more conductive and dielectric layer pairs. The three-dimensional memory structure further includes a plurality of coaxial contact structures formed in a first insulating layer over the staircase structure, wherein each coaxial contact structure includes one or more conductive and insulating ring pairs and a conductive core, each conductive and insulating ring pair having a conductive ring and an insulating ring.

公开(公告)号：US11552091B2

公开(公告)日：2023-01-10

申请号：US17313740

申请日：2021-05-06

Applicant: Yangtze Memory Technologies Co., Ltd.

Inventor： Zhongwang Sun ,  Guangji Li ,  Kun Zhang ,  Ming Hu ,  Jiwei Cheng ,  Shijin Luo ,  Kun Bao ,  Zhiliang Xia

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L27/11573 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11529

Abstract: Embodiments of contact structures of a three-dimensional memory device and fabrication method thereof are disclosed. The three-dimensional memory structure includes a film stack disposed on a substrate, wherein the film stack includes a plurality of conductive and dielectric layer pairs, each conductive and dielectric layer pair having a conductive layer and a first dielectric layer. The three-dimensional memory structure also includes a staircase structure formed in the film stack, wherein the staircase structure includes a plurality of steps, each staircase step having two or more conductive and dielectric layer pairs. The three-dimensional memory structure further includes a plurality of coaxial contact structures formed in a first insulating layer over the staircase structure, wherein each coaxial contact structure includes one or more conductive and insulating ring pairs and a conductive core, each conductive and insulating ring pair having a conductive ring and an insulating ring.

公开(公告)号：US11282854B2

公开(公告)日：2022-03-22

申请号：US16684793

申请日：2019-11-15

Applicant: Yangtze Memory Technologies Co., Ltd.

Inventor： Yingjie Ouyang ,  Zhiliang Xia ,  Lei Jin ,  Qiguang Wang ,  Wenxi Zhou ,  Zhongwang Sun ,  Rui Su ,  Yueqiang Pu ,  Jiwei Cheng

IPC: H01L27/11582 ,  G11C5/06 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11565 ,  H01L27/1157

Abstract: A semiconductor device is provided. The semiconductor device includes a channel structure that extends from a side of a substrate. The channel structure has sidewalls and a bottom region. The channel structure includes a bottom channel contact that is positioned at the bottom region, and a channel layer that is formed along the sidewalls and over the bottom channel contact. The channel structure further includes a high-k layer that is formed over the channel layer along the sidewalls of the channel structure and over the bottom channel contact.