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    Method for fabricating liquid crystal display
    1.
    发明授权
    Method for fabricating liquid crystal display 有权
    制造液晶显示器的方法

    公开(公告)号：US09070602B2

    公开(公告)日：2015-06-30

    申请号：US14297601

    申请日：2014-06-05

    Applicant: Ye Xin Technology Consulting Co., Ltd.

    Inventor： Yi-Chun Kao

    IPC: G02F1/1343 ,  H01L27/12 ,  H01L21/28 ,  G02F1/1345

    CPC classification number: H01L27/1259 ,  G02F1/13452 ,  G02F1/136227 ,  H01L21/28247 ,  H01L27/1244 ,  H01L27/1288

    Abstract: Method for manufacturing a thin film transistor liquid crystal display is provided. A substrate is provided. A gate electrode, a source electrode, a drain electrode, and a passivation film are formed on the substrate in sequence. The passivation film has a contact hole to expose a part of the drain electrode. A conductive layer is formed by coating nano metal material on the passivation film and in the contract hole from which the drain electrode is exposed. A pixel electrode is formed by patterning the conductive layer.

    Abstract translation: 提供了制造薄膜晶体管液晶显示器的方法。 提供基板。 依次在基板上形成栅电极，源电极，漏电极和钝化膜。 钝化膜具有露出一部分漏电极的接触孔。 通过将钝化膜上的纳米金属材料和漏电极露出的收缩孔中涂覆导电层。 通过图案化导电层形成像素电极。

    Thin film transistor and display array substrate using same
    5.
    发明授权
    Thin film transistor and display array substrate using same 有权
    薄膜晶体管和显示阵列基板使用相同

    公开(公告)号：US09478669B2

    公开(公告)日：2016-10-25

    申请号：US14467444

    申请日：2014-08-25

    Applicant: Ye Xin Technology Consulting Co., Ltd.

    Inventor： I-Wei Wu ,  I-Min Lu ,  Wei-Chih Chang ,  Hui-Chu Lin ,  Yi-Chun Kao ,  Kuo-Lung Fang

    IPC: H01L29/10 ,  H01L29/786 ,  H01L29/66 ,  H01L21/3105 ,  H01L21/311

    CPC classification number: H01L29/7869 ,  H01L21/31058 ,  H01L21/31144 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78606

    Abstract: A thin film transistor includes a gate electrode, a gate insulating layer, a channel layer, an etching stop layer, two contact holes, a source, and a drain. The gate insulating layer covers the gate electrode. The channel layer is arranged on the gate insulating layer corresponding to the gate electrode. The etching stop layer covers the channel layer and includes an organic stop layer and a hard mask layer, the hard mask layer is located on a surface of the organic stop layer opposite to the channel layer to enhance a hardness of the organic stop layer. The two contact holes pass through the etching stop layer. The source connects to the channel via one contact hole, and the drain connects to the channel via the other contact hole.

    Abstract translation: 薄膜晶体管包括栅电极，栅极绝缘层，沟道层，蚀刻停止层，两个接触孔，源极和漏极。 栅极绝缘层覆盖栅电极。 沟道层布置在对应于栅电极的栅极绝缘层上。 蚀刻停止层覆盖沟道层并且包括有机阻挡层和硬掩模层，硬掩模层位于与沟道层相对的有机阻挡层的表面上，以提高有机阻挡层的硬度。 两个接触孔穿过蚀刻停止层。 源极通过一个接触孔连接到通道，漏极通过另一个接触孔连接到通道。

    Display array substrate and manufacturing method thereof
    7.
    发明授权
    Display array substrate and manufacturing method thereof 有权
    显示阵列基板及其制造方法

    公开(公告)号：US09425294B2

    公开(公告)日：2016-08-23

    申请号：US14556731

    申请日：2014-12-01

    Applicant: Ye Xin Technology Consulting Co., Ltd.

    Inventor： Po-Li Shih ,  Yi-Chun Kao

    IPC: H01L29/66 ,  H01L29/786 ,  H01L29/12

    CPC classification number: H01L27/1214 ,  H01L27/124 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869

    Abstract: A manufacturing method of display array substrate is provided. The method includes depositing a first metal layer on a substrate and defining a peripheral area and a display area, coating a photo-resist layer on the first metal layer located in the peripheral area, anodizing the first metal layer to a first metal oxide layer with the photo-resist layer as a mask, patterning the first metal oxide layer located in the display area to a gate insulator, removing the photo-resist layer to expose the first metal layer in the peripheral area, forming a channel layer on the gate insulator, and depositing a second metal layer and patterning the second metal layer located in the display area to form a source electrode and a drain electrode.

    Abstract translation: 提供了一种显示阵列基板的制造方法。 该方法包括在衬底上沉积第一金属层并限定外围区域和显示区域，在位于周边区域的第一金属层上涂覆光致抗蚀剂层，将第一金属层阳极氧化为第一金属氧化物层， 作为掩模的光致抗蚀剂层，将位于显示区域中的第一金属氧化物层图案化成栅极绝缘体，去除光致抗蚀剂层以露出周边区域中的第一金属层，在栅极绝缘体上形成沟道层 并且沉积第二金属层并且图案化位于显示区域中的第二金属层以形成源电极和漏电极。

    Self-aligned metal oxide thin film transistor and method of making same
    8.
    发明授权
    Self-aligned metal oxide thin film transistor and method of making same 有权
    自对准金属氧化物薄膜晶体管及其制造方法

    公开(公告)号：US09379251B1

    公开(公告)日：2016-06-28

    申请号：US14591189

    申请日：2015-01-07

    Applicant: Ye Xin Technology Consulting Co., Ltd.

    Inventor： Kuo-Lung Fang ,  Yi-Chun Kao ,  Po-Li Shih ,  Chih-Lung Lee ,  Hsin-Hua Lin

    IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66

    CPC classification number: H01L29/78696 ,  H01L21/425 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/7869

    Abstract: A method for forming a TFT includes providing a substrate, a gate electrode on the substrate, an electrically insulating layer on the substrate to totally cover the gate electrode, a channel layer on the electrically insulating layer, a first photoresist pattern on the channel layer, a metal layer on the electrically insulating layer, the channel layer and the first photoresist layer, and a second photoresist pattern on the metal layer. A middle portion of the metal layer is then removed to form a source electrode and a drain electrode and to expose the first photoresist pattern and a portion of the channel layer between the first and second photoresist patterns. The exposed portion of the channel layer is then processed to have its electrical conductivity be lowered to thereby reduce a hot-carrier effect of the channel layer.

    Abstract translation: 一种用于形成TFT的方法，包括：在基板上设置基板，栅电极，在基板上形成电绝缘层，以完全覆盖栅电极，电绝缘层上的沟道层，沟道层上的第一光刻胶图案， 电绝缘层上的金属层，沟道层和第一光致抗蚀剂层，以及金属层上的第二光致抗蚀剂图案。 然后去除金属层的中间部分以形成源电极和漏电极，并且在第一和第二光致抗蚀剂图案之间露出第一光致抗蚀剂图案和沟道层的一部分。 然后处理通道层的暴露部分以使其导电性降低，从而降低沟道层的热载流子效应。

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