公开(公告)号：US10483220B2

公开(公告)日：2019-11-19

申请号：US15239545

申请日：2016-08-17

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Andrea Paleari ,  Antonella Milani ,  Lucrezia Guarino ,  Federica Ronchi

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/525 ,  H01L23/528 ,  H01L23/532

Abstract: In one embodiment, a method manufactures a semiconductor device including metallizations having peripheral portions with one or more underlying layers having marginal regions extending facing the peripheral portions. The method includes: providing a sacrificial layer to cover the marginal regions of the underlying layer, providing the metallizations while the marginal regions of the underlying layer are covered by the sacrificial layer, and removing the sacrificial layer so that the marginal regions of the underlying layer extend facing the peripheral portions in the absence of contact interface therebetween, thereby avoiding thermo-mechanical stresses.

公开(公告)号：US09405511B2

公开(公告)日：2016-08-02

申请号：US14524774

申请日：2014-10-27

Applicant: STMICROELECTRONICS (CANADA), INC. ,  STMICROELECTRONICS S.r.l.

Inventor： John Hogeboom ,  Hock Khor ,  Matteo Alessio Traldi ,  Anton Pelteshki

IPC: H03H7/06 ,  G06F7/72 ,  H03H17/06 ,  G06F5/16 ,  H04L25/02

CPC classification number: G06F7/724 ,  G06F5/16 ,  H03H17/06 ,  H04L25/0272 ,  H04L25/0288

Abstract: A FIR transmit architecture uses multiple driver divisions to allow signals with different delays to be summed into the output signal by the driver itself. The architecture includes a first multiplexer, a plurality of delay cells, a plurality of sign blocks, a switch block, a second multiplexer, and a plurality of drivers.

Abstract translation: FIR发送架构使用多个驱动器分区，以允许具有不同延迟的信号被驱动器自身求和到输出信号中。 该架构包括第一多路复用器，多个延迟单元，多个符号块，开关块，第二多路复用器和多个驱动器。

公开(公告)号：US10451703B2

公开(公告)日：2019-10-22

申请号：US16213534

申请日：2018-12-07

Applicant: STMicroelectronics S.r.l.

Inventor： Riccardo Condorelli ,  Daniele Mangano

IPC: G01R35/00 ,  G01R27/26 ,  G01R27/02 ,  G01D3/028 ,  G01D5/24 ,  H02J7/04 ,  H02J7/34

Abstract: A method of interfacing a LC sensor with a control unit is provided. The control unit may include first and second contacts, where the LC sensor is connected between the first and the second contact. A capacitor is connected between the first contact and a ground. To start the oscillation of the LC sensor, the method may include during a first phase, connecting the first contact to a supply voltage and placing the second contact in a high impedance state such that the capacitor is charged through the supply voltage. During a second phase, the first contact may be placed in a high impedance state, and the second contact connected to the ground such that the capacitor transfers charge towards the LC sensor. During a third phase, the first contact and the second contact may be placed in a high impedance state so the LC sensor is able to oscillate.

公开(公告)号：US10151833B2

公开(公告)日：2018-12-11

申请号：US14972329

申请日：2015-12-17

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Giampiero Borgonovo ,  Marco Montagnana

IPC: G01S13/93 ,  G01S7/28 ,  G01S13/524 ,  G01S7/292 ,  G01S13/00 ,  G01S7/35 ,  G01S13/42 ,  G01S13/02

Abstract: An accelerator device for use in generating a list of potential targets in a radar system, such as an anti-collision radar for a motor vehicle, may process radar data signals arranged in cells stored in a system memory. A cell under test in is identified as a potential target if the cell under test is a local peak over boundary cells and is higher than a certain threshold calculated by sorting range and velocity radar data signals arranged in windows. The cells identified as a potential target are sorted in a sorted list of potential targets. The accelerator device may include a double-buffering local memory for storing cell under test and boundary cell data; and a first and a second sorting unit for performing concurrent sorting of the radar data signals arranged in windows and the cells identified as a potential target in pipeline with accesses to the system memory.