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公开(公告)号：US20250167687A1
公开(公告)日：2025-05-22
申请号：US18953063
申请日：2024-11-20
Applicant: Chengdu Monolithic Power Systems Co., Ltd.
Inventor： Junlin Qian , Yuedong Chen
Abstract: A controller for a switching converter with a power switch includes a gate driver, a first transistor, and a regulator. The gate driver and provides a drive voltage to control the power switch based on a switch control signal. The first transistor is coupled between a first power supply node and a power supply terminal of the gate driver. A current sense signal representative of a current flowing through the power switch is provided to a floating node in response to the switch control signal being a first level, and the floating node is coupled to a reference ground in response to the switch control signal being a second level. A gate voltage of the first transistor is adjusted by the regulator coupled to the floating node based on a float reference voltage and a feedback voltage provided by a feedback stage.
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2.发明申请公开(公告)号：US20250167666A1
公开(公告)日：2025-05-22
申请号：US19029768
申请日：2025-01-17
Applicant: Lutron Technology Company LLC
Inventor： Brian J. Bollinger , Venkatesh Chitta , Firozbabu Cholashari , Jonathan Waldron
Abstract: A load control device for controlling power delivered from an AC power source to an electrical load may have a closed-loop gate drive circuit for controlling a semiconductor switch of a controllably conductive device. The controllably conductive device may be coupled in series between the source and the load. The gate drive circuit may generate a target signal in response to a control circuit. The gate drive circuit may shape the target signal over a period of time and may increase the target signal to a predetermined level after the period of time. The gate drive circuit may receive a feedback signal that indicates a magnitude of a load current conducted through the semiconductor switch. The gate drive circuit may generate a gate control signal in response to the target signal and the feedback signal, and render the semiconductor switch conductive and non-conductive in response to the gate control signal.
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公开(公告)号：US20250158607A1
公开(公告)日：2025-05-15
申请号：US18793701
申请日：2024-08-02
Applicant: Mitsubishi Electric Corporation
Inventor： Shohei SANO , Motoki IMANISHI
IPC: H03K17/0812 , H02M1/08 , H02M1/32
Abstract: A semiconductor element driving apparatus includes a primary circuit, a signal transmission circuit including an insulating element, and a secondary circuit that drives a semiconductor element based on a plurality of transmission signals corresponding to a plurality of signals transmitted from the primary circuit through the signal transmission circuit. The secondary circuit includes an ASC mode determination circuit that determines whether a normal mode or an ASC mode is executed based on a transmission transition signal corresponding to a transition signal or to a control transition signal among the plurality of transmission signals.
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公开(公告)号：US12301220B2
公开(公告)日：2025-05-13
申请号：US18629295
申请日：2024-04-08
Inventor： Ming Hsien Tsai
IPC: H02M1/00 , H02M1/08 , H02M1/32 , H03K17/0812
Abstract: An IC includes power and reference nodes, a protection circuit, and a gate driver. The protection circuit includes a series of diode-configured enhancement-mode n-type HEMTs coupled between the power and reference nodes and including a voltage tap, a first enhancement-mode n-type HEMT including a gate coupled to the voltage tap and a source terminal coupled to the reference node, and a second enhancement-mode n-type HEMT including a gate coupled to a drain terminal of the first n-type HEMT and a source terminal coupled to the reference node. The gate driver includes a third enhancement-mode n-type HEMT including a gate coupled to a drain terminal of the second n-type HEMT, a fourth enhancement-mode n-type HEMT including a gate coupled to a source terminal of the third n-type HEMT and a source terminal coupled to the reference node, and an output terminal coupled to a drain terminal of the fourth n-type HEMT.
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公开(公告)号：US12301217B2
公开(公告)日：2025-05-13
申请号：US18064340
申请日：2022-12-12
Applicant: RENESAS ELECTRONICS AMERICA INC.
Inventor： Tetsuo Sato
IPC: H03K17/082 , H03K17/042 , H02M1/08
Abstract: Semiconductor devices for driving transistors in a power device are described. A semiconductor device can include a voltage source configured to provide a fixed bias voltage to a first device implemented as a common gate device. The semiconductor device can further include a second device connected in series with the first device. The current output of the second device can be connected to a source terminal of the first device. The semiconductor device can further include a driver configured to drive the second device to perform current control on the first device.
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Patent Agency Ranking
公开(公告)号：US12301124B2
公开(公告)日：2025-05-13
申请号：US17970897
申请日：2022-10-21
Applicant: NANOWATT INC.
Inventor： Wenbo Liang , Edward Er Deng , Ying Li , San Hwa Chee
Abstract: An AC-DC converter includes an AC voltage source, a rectifier, and a rectifier control circuit. The rectifier includes a field effect transistor (FET) having a source, a drain, and a gate. The drain of the FET is coupled to the AC voltage source, and the source is coupled to ground. The rectifier control circuit is coupled to the gate of the FET. The rectifier control circuit is configured to provide a ramp voltage to regulate the FET after the AC voltage source is turned off.
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公开(公告)号：US12301114B2
公开(公告)日：2025-05-13
申请号：US17972811
申请日：2022-10-25
Applicant: Dell Products L.P.
Inventor： Chia-Kun Wu , Shao-Suz Ho , Wen-Yung Chang
Abstract: A buck converter includes a high-side N-FET, a low-side N-FET, a P-FET, a between a gate terminal and a source terminal of the P-FET, aa capacitor, and a FET driver. The FET driver operates in a selectable one of a continuous current mode and a discontinuous current mode. In a first phase of the discontinuous current mode, a gate voltage on the gate terminal the N-FET equalizes to a source voltage on the source terminal of the N-FET to turn on the first N-FET. A high output voltage on a high-side output of the FET driver is high enough to overcome a threshold voltage of a body diode of the first P-FET to provide the high output voltage minus a threshold voltage to the gate terminal of the high-side P-FET to turn on the high-side P-FET.
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公开(公告)号：US12301106B2
公开(公告)日：2025-05-13
申请号：US17928104
申请日：2021-06-01
Applicant: ABL IP Holding LLC
Inventor： Luis Manuel Leon Lara
Abstract: A resonant tank converter including a reconfigurable resonant tank circuit including a switch configured to switch a resonant tank configuration of the reconfigurable resonant tank circuit to a first or second configuration in response to feedback signals representative of the output to a load. In some embodiments, the first configuration is an LLC resonant tank configuration, and the second configuration is an LCC resonant tank configuration.
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公开(公告)号：US12294287B2
公开(公告)日：2025-05-06
申请号：US17756404
申请日：2020-02-10
Applicant: Mitsubishi Electric Corporation
Inventor： Kazuaki Hiyama
IPC: H02M1/08 , H02M1/00 , H02M3/157 , H10D62/832
Abstract: An object is to provide a technique capable of bringing a switching time point of a gate drive condition close to an appropriate switching time point. A semiconductor switching element drive circuit includes a logic circuit that inverts a level of an output signal based on a divided voltage of an output voltage of a semiconductor switching element, and a switching circuit. The switching circuit switches a gate drive condition of the semiconductor switching element during a turn-off operation from a first gate drive condition to a second gate drive condition in which a switching speed is lower than that of the first gate drive condition based on the output signal from the logic circuit.
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公开(公告)号：US12289051B2
公开(公告)日：2025-04-29
申请号：US17706237
申请日：2022-03-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaekwan Kim , Gwangyol Noh , Hwayeal Yu , Gil Won Yoon
Abstract: A switching regulator may include; an inductor connected to a switch node, a power switch connected to the switch node and configured to apply a first voltage to the switch node in response to a first control signal and to apply a second voltage to the switch node in response to a second control signal, and a controller configured to generate the first control signal and the second control signal. The second control signal transitions from low to high following a first dead time after the first control signal transitions from low to high, the first control signal transitions from high to low following a second dead time after the second control signal transitions from high to low level, and an inductor current flowing through the inductor flows in a first direction during the first dead time and in a second direction, different from the first direction, during the second dead time.
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