A paging receiver has a synthesizer for governing the receive frequency. The paging receiver further has characteristics which are varied in response to the receive frequency. These characteristics include varying the bandwidth (52) of a loop filter (26) within a phase lock loop (16) within the synthesizer as well as varying the time in which a detector circuit used to extract a DC level from a recovered audio signal is disabled. Furthermore, the bandwidth of the loop filter is varied in response to switching from a first receive frequency to a second receive frequency in order to provide for either a uniform frequency lock time (54) or for a rapid frequency lock time. Furthermore, the time in which the detector circuit is disabled is correspondingly changed.