Invention Patent
- Patent Title: SOLDER INTERCONNECTIONS AND METHODS FOR MAKING SAME
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Application No.: CA2084685Application Date: 1990-10-16
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Publication No.: CA2084685A1Publication Date: 1991-12-20
- Inventor: AGARWALA BIRENDRA N , AHSAN AZIZ M , BROSS ARTHUR , CHADURJIAN MARK F , KOOPMAN NICHOLAS G , LEE LI-CHUNG , PUTTLITZ KARL J , RAY SUDIPTA K , RYAN JAMES G , SCHAEFER JOSEPH G , SRIVASTAVA KAMALESH K , TOTTA PAUL A , WALTON ERICK G , WIRSING ADOLF E
- Applicant: IBM
- Assignee: IBM
- Current Assignee: IBM
- Priority: US54025690 1990-06-19
- Main IPC: H01L21/60
- IPC: H01L21/60 ; H01L23/485 ; H05K3/34
Abstract:
The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.
Public/Granted literature
- CA2084685C SOLDER INTERCONNECTIONS AND METHODS FOR MAKING SAME Public/Granted day:1996-01-16
Information query
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