The invention discloses an LDMOS device which comprises a P-type epitaxial layer, an N-well, a P-well, a first N-type drift region, a first P-type layer, a second N-type drift region, a second P-type layer, a gate oxide layer and gate polysilicon. The P-well, the second N-type drift region, the first N-type drift region and the N-well are sequentially contiguous from left to right at the upper part of the P-type epitaxial layer. The second N-type drift region is shallower than the first N-type drift region. The second P-type layer is adjacent to the lower part of the second N-type drift region. The first P-type layer is adjacent to the lower part of the first N-type drift region. The second P-type layer is shallower than the first P-type layer. The second P-type layer has a higher doping concentration than the first P-type layer. The invention further discloses a manufacturing method for the LDMOS device. According to the invention, the LDMOS device has lower on-resistance, and can satisfy off-state breakdown voltage and on-state breakdown voltage at the same time.