The embodiment of the invention provides a semiconductor memory device capable of improving the reliability of data. The semiconductor memory device (1) includes a bit line (BL) connected to one end of a select transistor (ST1); a source line (CELSRC) connected to one end of a select transistor (ST2); select gate lines (SGD, SGC) and a well line (WL) respectively connected to grid electrodes of the select transistors (ST1, ST2) and a memory transistor (MT); and a control circuit (14) performing a write operation of the select transistor (ST1). In the write operation, before Vpgm is appled to the select line (SGD), a pre-charge operation of the bit line is performed, in which Vusel is applied to the word line (WL) and the select line (SGS), the Vblh higher than the Vusel is applied to the source line (CELSRC), and the Vg lower than the Vblh is applied to the first select line.