The present invention relates to a test structure, and relates to a semiconductor integrated circuit. A plurality of sets of NMOS with P-wells, PMOS with N-wells, PMOS without wells and MOSFET semiconductor devices without wells are simultaneously fabricated; the channel lengths between groups of semiconductor devices are different, and the threshold voltage of the well-doped device of at least one group of semiconductor devices and the threshold voltage of the device without the well doping are tested to obtain a threshold voltage database, and the threshold voltage database is analyzed to obtain the effect of a well doping on the threshold voltage; extracting the channel carrier mobility of each group of well-doped devices and the channel carrier mobility of devices without well doping,obtaining a channel carrier mobility database, analyzing the channel carrier mobility database to obtain the effect of well doping on the channel carrier mobility. Thus, the effect of well doping on the device threshold voltage (Vt) and the carrier mobility (Ion/Ioff) in the channel can be evaluated. The cost is low, and resources can be saved.