The invention relates to a graph calculation optimization method based on multi-FPGA accelerator interconnection. The invention aims at the problem that the calculation communication ratio for a graphenvironment is low, and the problems of high Graph Procedure communication expenditure, unbalanced load and the like in graph calculation in a heterogeneous environment are solved; the objective of the invention is to save the communication overhead between accelerators in a Graph partitioning mode through an optimization graph, so as to improve the expansibility of a system. Through a dynamic scheduling method, the load capacity between accelerators is balanced so as to improve the calculation performance, meanwhile, the locality and parallelism of the graph are coordinated; through optimizing the graph data division, organization and scheduling method under the multi-FPGA interconnection architecture, effective balance tradeoff between efficient division and high-speed operation of sub-graphs is realized. A preprocessing module divides the graph data Graph data into a plurality of sub-graph data Subgraph data according to a mode of not pursuing load extreme balance between FPGA accelerators, and the at least two FPGA accelerators perform graph calculation on the sub-graph data according to a dynamic scheduling mode to obtain a calculation result.