A fuse and antifuse link structure, which when used with a memory integrated circuit device such as a gate array or programmable read-only memory (PROM), allows the memory circuit to be reprogrammed. The fuse and antifuse link is comprised of a fuse 12 and an antifuse 16, connected in series, parallel, or a combination thereof. Either element of the link can be programmed initially, and the other can be programmed in a second step, to reverse the first programming. Several links can be used in one circuit to provide multiple reprogramming capability.