A serial-flash, EPROM, EEPROM, or flash EEPROM nonvolatile memory in AMG configuration includes a byte enable transistor having an input terminal, connected to a control gate line and receives an input voltage, an output terminal, connected to at least one memory cell and supplying an output voltage, a control terminal connected to a word line, and a bulk region housing conductive regions connected to the input and output terminals. The byte enable transistor is a P-channel MOS transistor, the bulk region whereof is biased to a bulk voltage that is not lower than the input voltage.