Invention Grant
- Patent Title: Microelectronic package having stub minimization using symmetrically-positioned duplicate sets of terminals for wirebond assemblies without windows
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Application No.: US15348238Application Date: 2016-11-10
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Publication No.: US10032752B2Publication Date: 2018-07-24
- Inventor: Richard Dewitt Crisp , Wael Zohni , Belgacem Haba , Frank Lambrecht
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporation
- Current Assignee: Invensas Corporation
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; G11C5/04 ; G11C5/06 ; H01L23/00 ; H01L23/13 ; H01L23/498 ; H01L23/50 ; H01L23/48 ; G11C8/18 ; H01L23/02

Abstract:
A microelectronic assembly can include a microelectronic package connected with a circuit panel. The package has a microelectronic element having a front face facing away from a substrate of the package, and electrically connected with the substrate through conductive structure extending above the front face. First terminals provided in first and second parallel grids or in first and second individual columns can be configured to carry address information usable to determine an addressable memory location from among all the available addressable memory locations of the memory storage array. The first terminals in the first grid can have signal assignments which are a mirror image of the signal assignments of the first terminals in the second grid.
Public/Granted literature
- US20170062389A1 STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS Public/Granted day:2017-03-02
Information query
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