A chip with I/O pads on the peripheries and a method making the chip is disclosed. The chip includes: a substrate; a first metal layer, formed above the substrate; an inter-metal dielectric layer, formed above the first metal layer, having concave portions formed along the peripheries of the chip so that a portion of the first metal layer is exposed to form an input-output (I/O) pad in each of the concave portions which are spaced apart from each other; and a passivation layer, formed above the second metal layer without covering the concave portions so that specific circuits are formed by the first metal layer and the second metal layer, respectively. By changing the I/O pad from the top of the chip to the peripheries, the extra thickness of the packaged chip caused by wire bonding in the prior arts can be reduced.