Invention Grant
- Patent Title: Process synchronization between engines using data in a memory location
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Application No.: US14692984Application Date: 2015-04-22
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Publication No.: US10078879B2Publication Date: 2018-09-18
- Inventor: Hema Chand Nalluri , Aditya Navale
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Womble Bond Dickinson (US) LLP
- Main IPC: G09G5/36
- IPC: G09G5/36 ; G06T1/20 ; G06F9/52 ; G09G5/00

Abstract:
Memory-based semaphores are described that are useful for synchronizing processes between different processing engines. In one example, operations include executing a first process at a first processing engine, the executing including updating a memory register, sending a signal from the first processing engine to a second processing engine that the memory register has been updated, the signal including a memory register address to identify the updated memory register inline data and a dataword, fetching data from the memory register by the second processing engine, comparing the fetched data to the received dataword, and conditionally executing a next command of a second process at the second processing engine based on the comparison.
Public/Granted literature
- US20150287159A1 PROCESS SYNCHRONIZATION BETWEEN ENGINES USING DATA IN A MEMORY LOCATION Public/Granted day:2015-10-08
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