Invention Grant
- Patent Title: 3D stacked multilayer semiconductor memory using doped select transistor channel
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Application No.: US15254605Application Date: 2016-09-01
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Publication No.: US10090316B2Publication Date: 2018-10-02
- Inventor: Fumio Ootsuka
- Applicant: ASM IP Holding B.V.
- Applicant Address: NL Almere
- Assignee: ASM IP Holding B.V.
- Current Assignee: ASM IP Holding B.V.
- Current Assignee Address: NL Almere
- Agency: Snell & Wilmer L.L.P.
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L27/11578 ; H01L27/11582 ; H01L27/1157
Abstract:
In 3D stacked multilayer semiconductor memories including NAND and NOR flash memories, a lightly boron-doped layer is formed on top of a heavily boron-doped layer to form a select transistor, wherein the former serves as a channel of the select transistor and the latter serves as an isolation region which isolates the select transistor from a memory transistor.
Public/Granted literature
- US20180061851A1 3D STACKED MULTILAYER SEMICONDUCTOR MEMORY USING DOPED SELECT TRANSISTOR CHANNEL Public/Granted day:2018-03-01
Information query
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