Invention Grant
- Patent Title: Vertical memory having varying storage cell design through the storage cell stack
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Application No.: US14998251Application Date: 2015-12-26
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Publication No.: US10128262B2Publication Date: 2018-11-13
- Inventor: Randy J. Koval , Hiroyuki Sanda
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: H01L27/115
- IPC: H01L27/115 ; G11C16/26 ; H01L27/11582 ; H01L27/11556 ; H01L27/11524 ; H01L27/1157 ; G11C16/08 ; H01L27/11526 ; H01L27/11573 ; H01L21/3213 ; H01L27/11519 ; H01L27/11565
Abstract:
An apparatus is described having a memory. The memory includes a vertical stack of storage cells, where, a first storage node at a lower layer of the vertical stack has a different structural design than a second storage node at a higher layer of the vertical stack.
Public/Granted literature
- US20170186765A1 Vertical memory having varying storage cell design through the storage cell stack Public/Granted day:2017-06-29
Information query
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