Semiconductor memory device and reading method thereof
Abstract:
A semiconductor memory device and a reading method thereof are provided. A flash memory includes a memory cell array; a page buffer/reading circuit, holding data of a selected page of the memory cell array; a decoding/selecting circuit, selecting n bits data from the data held by the page buffer based on a column address; and a data bus for n bits, which is connected to the decoding/selecting circuit. The decoding/selecting circuit further connects n/2 bits data of an even address to a lower bit position of the data bus and connects n/2 bits data of an odd address to a upper bit position of the data bus based on the column address. When the start address is the odd address, data of the odd address and data of the even address next to the odd address are selected.
Public/Granted literature
Information query
Patent Agency Ranking
0/0