Invention Grant
- Patent Title: Conductive layout structure including high resistive layer
-
Application No.: US15853978Application Date: 2017-12-26
-
Publication No.: US10192826B2Publication Date: 2019-01-29
- Inventor: Kun-Ju Li , Kuo-Chin Hung , Min-Chuan Tsai , Wei-Chuan Tsai , Yi-Han Liao , Chun-Tsen Lu , Fu-Shou Tsai , Li-Chieh Hsu
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: TW105132044A 20161004
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L29/41 ; H01L23/528 ; H01L23/532 ; H01L23/485 ; H01L21/768 ; H01L23/522 ; H01L29/417 ; H01L29/66 ; H01L29/78
Abstract:
A layout structure including a conductive structure is provided. The layout structure includes a dielectric layer formed on a substrate and a conductive structure formed in the dielectric layer. And the conductive structure further includes a barrier layer, a metal layer formed within the barrier layer, and a high resistive layer sandwiched in between the barrier layer and the metal layer.
Public/Granted literature
Information query
IPC分类:
