Invention Grant
- Patent Title: Epitaxy technique for reducing threading dislocations in stressed semiconductor compounds
-
Application No.: US13756806Application Date: 2013-02-01
-
Publication No.: US10211048B2Publication Date: 2019-02-19
- Inventor: Wenhong Sun , Rakesh Jain , Jinwei Yang , Maxim S. Shatalov , Alexander Dobrinsky , Remigijus Gaska , Michael Shur
- Applicant: Sensor Electronic Technology, Inc.
- Applicant Address: US SC Columbia
- Assignee: Sensor Electronic Technology, Inc.
- Current Assignee: Sensor Electronic Technology, Inc.
- Current Assignee Address: US SC Columbia
- Agency: LaBatt, LLC
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/06 ; H01L33/00 ; H01L33/12 ; H01L33/16

Abstract:
A solution for fabricating a semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer. One or more of a set of growth conditions, a thickness of one or both of the layers, and/or a lattice mismatch between the layers can be configured to create a target level of compressive and/or shear stress within a minimum percentage of the interface between the layers.
Public/Granted literature
- US20130193480A1 Epitaxy Technique for Reducing Threading Dislocations in Stressed Semiconductor Compounds Public/Granted day:2013-08-01
Information query
IPC分类: