Invention Grant
- Patent Title: Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method
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Application No.: US15499647Application Date: 2017-04-27
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Publication No.: US10249577B2Publication Date: 2019-04-02
- Inventor: Choong Man Lee , Yong Min Yoo , Young Jae Kim , Seung Ju Chun , Sun Ja Kim
- Applicant: ASM IP Holding B.V.
- Applicant Address: NL Almere
- Assignee: ASM IP Holding B.V.
- Current Assignee: ASM IP Holding B.V.
- Current Assignee Address: NL Almere
- Agency: Snell & Wilmer L.L.P.
- Priority: KR10-2016-0060210 20160517
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L23/00 ; H01L21/768 ; H01L21/02 ; H01L23/532 ; H01L23/522
Abstract:
A semiconductor manufacturing method includes depositing a low-k dielectric layer, forming a trench in the low-k dielectric layer, forming a barrier layer in the trench, filling a metal on the barrier layer, planarizing the metal, and forming a capping layer on the planarized metal, wherein the capping layer includes at least two layers.
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