Invention Grant
- Patent Title: Techniques for hardware video encoding
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Application No.: US15663134Application Date: 2017-07-28
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Publication No.: US10291925B2Publication Date: 2019-05-14
- Inventor: James M. Holland , Srinivasan Embar Raghukrishnan , Lidong Xu , Fangwen Fu , Dmitry E. Ryzhov , Satya N. Yedidi
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: International IP Law Group, P.L.L.C.
- Main IPC: H04N7/12
- IPC: H04N7/12 ; H04N11/02 ; H04N11/04 ; H04N19/43 ; H04N19/53 ; H04N19/567 ; H04N19/115 ; H04N19/61 ; H04N19/126 ; H04N19/96 ; H04N19/192 ; H04N19/557 ; H04N19/625

Abstract:
An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder includes a fixed function hierarchical motion estimation search unit, fixed function integer motion estimation search units, and a fixed function check and refinement unit. The check and refinement unit is to generate residuals using nested loops based on at least one spatial domain prediction and at least one frequency domain prediction and perform a final mode decision based on rate distortion optimization (RDO) costs associated with the generated residuals. The hardware bit packing unit is to pack bits as coded according to the final mode decision into a data format.
Public/Granted literature
- US20190037227A1 TECHNIQUES FOR HARDWARE VIDEO ENCODING Public/Granted day:2019-01-31
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