Invention Grant
- Patent Title: Memory devices including capacitor structures having improved area efficiency
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Application No.: US15637328Application Date: 2017-06-29
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Publication No.: US10297659B2Publication Date: 2019-05-21
- Inventor: Eric H. Freeman
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L49/02 ; G11C16/10 ; H01L27/108 ; G11C16/24 ; H01L27/11526 ; H01L27/11529 ; H01L27/11573

Abstract:
Semiconductor structures including a plurality of conductive structures having a dielectric material therebetween are disclosed. The thickness of the dielectric material spacing apart the conductive structures may be adjusted to provide optimization of capacitance and voltage threshold. The semiconductor structures may be used as capacitors, for example, in memory devices. Various methods may be used to form such semiconductor structures and capacitors including such semiconductor structures. Memory devices including such capacitors are also disclosed.
Public/Granted literature
- US20170301750A1 MEMORY DEVICES INCLUDING CAPACITOR STRUCTURES HAVING IMPROVED AREA EFFICIENCY Public/Granted day:2017-10-19
Information query
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