A manufacturing method of an integrated circuit package including the following step is provided. A bottom redistribution layer according to IC design rule is fabricated. A top redistribution layer according to PCB design rule and using the first top pads as a starting point is fabricated. The bottom redistribution layer has a plurality of first bottom pads, a plurality of first top pads, at least one dielectric layer and a plurality of vias. Sides and the top of the bottom redistribution layer have interfaces with a lowermost dielectric layer of the top redistribution layer, a bottom surface of the lowermost dielectric layer opposite to the plurality of first top pads is coplanar with a bottom surface of the at least one dielectric layer opposite to the plurality of first top pads and surfaces of the plurality of first bottom pads exposed by the at least one dielectric layer.