A synchronous rectification controller includes a first gate pin coupled to a gate of a first synchronous rectification transistor, a first drain pin coupled to a drain of the first synchronous rectification transistor, a second gate pin coupled to a gate of a second synchronous rectification transistor, a second drain pin coupled to a drain of the second synchronous rectification transistor, a source pin coupled to a ground, a multiplexer selecting a voltage applied to the first drain pin in a first state, and selecting a voltage applied to the second drain pin in a second state, a pulse generator generating a pulse signal based on an output voltage of the multiplexer, a driving circuit switching the first synchronous rectification transistor according to the pulse signal in the first state, and switching the second synchronous rectification transistor according to the pulse signal in the second state.