Invention Grant
- Patent Title: Interconnect structure for a microelectronic device
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Application No.: US15282855Application Date: 2016-09-30
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Publication No.: US10366968B2Publication Date: 2019-07-30
- Inventor: Klaus Reingruber , Andreas Wolter , Georg Seidemann , Thomas Wagner , Bernd Waidhas
- Applicant: Intel IP Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L23/31

Abstract:
A microelectronic package with two semiconductor die coupled on opposite sides of a redistribution layer 108, and at least partially overlapping with one another. At least a first of the semiconductor die includes two sets of contacts, the first group of contacts arranged at a lesser pitch relative to one another than are a second group of contacts. The first group of contacts at the larger pitch are placed to engage contacts in a redistribution layer 108. The second group of contacts at the lesser pitch are placed to engage respective contacts at the same pitch on the second semiconductor die.
Public/Granted literature
- US20180096970A1 INTERCONNECT STRUCTURE FOR A MICROELECTRONIC DEVICE Public/Granted day:2018-04-05
Information query
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