Invention Grant
- Patent Title: Vertical transport fin field effect transistors on a substrate with varying effective gate lengths
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Application No.: US16000264Application Date: 2018-06-05
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Publication No.: US10381476B2Publication Date: 2019-08-13
- Inventor: Zhenxing Bi , Kangguo Cheng , Juntao Li , Peng Xu
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L29/417
- IPC: H01L29/417 ; H01L29/78 ; H01L29/66 ; H01L29/08 ; H01L29/10 ; H01L21/8234 ; H01L21/762 ; H01L29/06 ; H01L27/088 ; H01L21/308

Abstract:
A method of forming vertical transport fin field effect transistors, including, forming a bottom source/drain layer on a substrate, forming a channel layer on the bottom source/drain layer, forming a recess in the channel layer on a second region of the substrate, wherein the bottom surface of the recess is below the surface of the channel layer on a first region, forming a top source/drain layer on the channel layer, where the top source/drain layer has a greater thickness on the second region of the substrate than on the first region of the substrate, and forming a vertical fin on the first region of the substrate, and a vertical fin on the second region of the substrate, wherein a first top source/drain is formed on the vertical fin on the first region, and a second top source/drain is formed on the vertical fin on the second region.
Public/Granted literature
- US20180294352A1 VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS ON A SUBSTRATE WITH VARYING EFFECTIVE GATE LENGTHS Public/Granted day:2018-10-11
Information query
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