Invention Grant
- Patent Title: Interface for communication between circuit blocks of an integrated circuit, and associated apparatuses, systems, and methods
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Application No.: US15455059Application Date: 2017-03-09
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Publication No.: US10401928B2Publication Date: 2019-09-03
- Inventor: Ivan Herrera Mejia , Zeev Offen
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F1/24 ; G06F1/32 ; G06F1/324 ; G06F1/3296 ; G06F1/3234 ; G06F9/24 ; G06F9/4401

Abstract:
Embodiments including systems, methods, and apparatuses associated providing an interface between a north complex and a south complex of a system on a chip (SoC). In embodiments, the north complex may include a microcontroller in an input signal requirement. A power-on control block may be coupled with the microcontroller, and the power-on control block may be configured to receive a control signal from a component of the south complex, and alter the control signal based at least in part on the input signal requirement of the microcontroller.
Public/Granted literature
- US20170242708A1 NORTH COMPLEX/SOUTH COMPLEX INTERFACE Public/Granted day:2017-08-24
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