Invention Grant
- Patent Title: Method and apparatus for a high throughput rasterizer
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Application No.: US14581701Application Date: 2014-12-23
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Publication No.: US10410081B2Publication Date: 2019-09-10
- Inventor: Subramaniam Maiyuran , Thomas A. Piazza , Jorge F. Garcia Pabon , Shubh B. Shah
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06K9/46
- IPC: G06K9/46 ; G06T15/00

Abstract:
An apparatus and method are described for a high throughput rasterizer. For example, one embodiment of an apparatus comprises: block selection logic to select a plurality of pixel blocks associated with edges of a primitive, the plurality of pixel blocks selected based on the pixel blocks having samples which are both inside and outside of the primitive; and edge determination logic to analyze samples of the plurality of pixel blocks selected by the block selection logic and responsively generate data identifying each edge of the primitive; and final mask determination logic to combine the data identifying each edge and generate a final mask representing the primitive.
Public/Granted literature
- US20160180585A1 METHOD AND APPARATUS FOR A HIGH THROUGHPUT RASTERIZER Public/Granted day:2016-06-23
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