Arrangement for controlling a voltage signal between gate and emitter terminals (G-E) of a switch type power semiconductor component, such as an IGBT transistor, such that the voltage signal is formed at least partly by means of a resistance and a switch (RGON1-SGON1, RGOFF1-SGOFF1) connected in series between an auxiliary voltage (+UG4, −UG4) of a gate controller and the gate terminal (G) of the IGBT. The arrangement is adapted to control the switch (SGON1, SGOFF1) with a high frequency of at least 1 MHz and with a duty cycle adjusted such that the measured rate of change of a collector voltage of the IGBT being controlled is set in accordance with a reference value received from a control unit of the device.