Invention Grant
- Patent Title: Method for manufacturing a multi-layer circuit board capable of being applied with electrical testing
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Application No.: US16408431Application Date: 2019-05-09
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Publication No.: US10455694B2Publication Date: 2019-10-22
- Inventor: Chin-Kuan Liu , Chao-Lung Wang , Shuo-Hsun Chang , Yu-Te Lu , Chin-Hsi Chang
- Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
- Applicant Address: TW Taoyuan
- Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
- Current Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
- Current Assignee Address: TW Taoyuan
- Agency: Idea Intellectual Limited
- Agent Margaret A. Burke; Sam T. Yip
- Priority: TW106128030A 20170818
- Main IPC: H01K3/10
- IPC: H01K3/10 ; H05K1/02 ; H05K3/46 ; H05K1/09 ; H05K3/06 ; H01L21/48

Abstract:
A manufacturing method for a multi-layer circuit board is provided. The multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer, the delivery loading plate and the patterned metal interface layer expose the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board to check if the multi-layer circuit board can be operated normally or not.
Public/Granted literature
- US20190269008A1 METHOD FOR MANUFACTURING A MULTI-LAYER CIRCUIT BOARD CAPABLE OF BEING APPLIED WITH ELECTRICAL TESTING Public/Granted day:2019-08-29
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