Low frequency power management bus
Abstract:
A low frequency power management bus, a method of power management of a device, and a non-transitory computer readable program code configured to execute a power management process for a device are disclosed. The power management bus including a bus, and a plurality of power nodes connected to the bus, each of the plurality of power nodes including power management control logic, a power regulator, and a power policy, and wherein the plurality of power nodes are arranged in a topology with at least one node of the plurality of nodes being designated as a super power node, the super power node configured to be connected either directly or through another power node to each of the plurality of power nodes within the topology.
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