Invention Grant
- Patent Title: Isolation structures for an integrated circuit element and method of making same
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Application No.: US15747719Application Date: 2015-09-25
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Publication No.: US10468489B2Publication Date: 2019-11-05
- Inventor: Aaron D. Lilak , Uygar E. Avci , David L. Kencke , Patrick Morrow , Kerryann Foley , Stephen M. Cea , Rishabh Mehandru
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2015/052324 WO 20150925
- International Announcement: WO2017/052616 WO 20170330
- Main IPC: H01L29/417
- IPC: H01L29/417 ; H01L21/84 ; H01L27/12 ; H01L29/78

Abstract:
Techniques and mechanisms to provide insulation for a component of an integrated circuit device. In an embodiment, structures of a circuit component are formed in or on a first side of a semiconductor substrate, the structures including a first doped region, a second doped region and a third region between the first doped region and the second doped region. The substrate has formed therein an insulation structure, proximate to the circuit component structures, which is laterally constrained to extend only partially from a location under the circuit component toward an edge of the substrate. In another embodiment, a second side of the substrate—opposite the first side—is exposed by thinning to form the substrate from a wafer. Such thinning enables subsequent back side processing to form a recess in the second side, and to deposit the insulation structure in the recess.
Public/Granted literature
- US20180226478A1 ISOLATION STRUCTURES FOR AN INTEGRATED CIRCUIT ELEMENT AND METHOD OF MAKING SAME Public/Granted day:2018-08-09
Information query
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