Invention Grant
- Patent Title: Integrated circuit package substrate
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Application No.: US16264195Application Date: 2019-01-31
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Publication No.: US10522455B2Publication Date: 2019-12-31
- Inventor: Mathew J. Manusharow , Dustin P. Wood , Debendra Mallik
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/50 ; H01L23/00 ; G06F17/50 ; H01L23/522 ; H01L23/528 ; H01L23/525

Abstract:
Embodiments of the present disclosure are directed towards techniques and configurations for designing and assembling a die capable of being adapted to a number of different packaging configurations. In one embodiment an integrated circuit (IC) die may include a semiconductor substrate. The die may also include an electrically insulative material disposed on the semiconductor substrate; a plurality of electrical routing features disposed in the electrically insulative material to route electrical signals through the electrically insulative material; and a plurality of metal features disposed in a surface of the electrically insulative material. In embodiments, the plurality of metal features may be electrically coupled with the plurality of electrical routing features. In addition, the plurality of metal features may have an input/output (I/O) density designed to enable the die to be integrated with a plurality of different package configurations. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20190164881A1 INTEGRATED CIRCUIT PACKAGE SUBSTRATE Public/Granted day:2019-05-30
Information query
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