Invention Grant
- Patent Title: Display
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Application No.: US16239919Application Date: 2019-01-04
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Publication No.: US10528205B2Publication Date: 2020-01-07
- Inventor: Masanobu Ikeda , Koji Ishizaki , Hayato Kurasawa , Yoshihiro Watanabe , Toshimasa Ishigaki , Daisuke Sonoda , Tatsuya Ide
- Applicant: Japan Display Inc.
- Applicant Address: JP Tokyo
- Assignee: Japan Display Inc.
- Current Assignee: Japan Display Inc.
- Current Assignee Address: JP Tokyo
- Agency: Michael Best & Friedrich LLP
- Priority: JP2014-125011 20140618
- Main IPC: G06F3/044
- IPC: G06F3/044 ; G02F1/1333 ; G06F3/041 ; G02F1/1362 ; G02F1/1343

Abstract:
To reduce disturbances in display of images due to static electricity without deteriorating optical properties in a display. The display includes a conductive pattern provided on the upper surface of the substrate, a protection layer provided on the upper surface of the substrate to cover the conductive pattern, and a conductive layer provided on the protection layer. The sheet resistance of the conductive pattern is not more than 8 Ω/square. A ratio of the total sum of areas of portions of the plurality of sub-pixels that overlap the conductive pattern in a plan view to the total sum of the areas of the plurality of sub-pixels is 1 to 22%. A sheet resistance of the conductive layer is higher than the sheet resistance of the conductive pattern.
Public/Granted literature
- US20190138134A1 DISPLAY Public/Granted day:2019-05-09
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