Invention Grant
- Patent Title: Vertical cross-point memory arrays
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Application No.: US16042359Application Date: 2018-07-23
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Publication No.: US10529778B2Publication Date: 2020-01-07
- Inventor: Lidia Vereen , Bruce L. Bateman , David A. Eggleston , Louis C. Parrillo
- Applicant: Unity Semiconductor Corporation
- Applicant Address: US CA Sunnyvale
- Assignee: Unity Semiconductor Corporation
- Current Assignee: Unity Semiconductor Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Lowenstein Sandler LLP
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L27/24 ; H01L45/00 ; H01L23/528

Abstract:
A method of manufacturing a memory structure includes forming a plurality of vertically-stacked horizontal line layers, interleaving a plurality of electrically conductive vertical lines with the electrically conductive horizontal lines, and forming a memory film at and between intersections of the electrically conductive vertical lines and the horizontal lines. In one embodiment of the invention, the electrically conductive vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each horizontally-adjacent pair of horizontal lines in each horizontal line layer. By configuring the electrically conductive vertical lines and electrically conductive horizontal lines so that a row of vertical lines is positioned between each horizontally-adjacent pair of horizontal lines, a unit memory cell footprint of just 2F2 may be realized.
Public/Granted literature
- US20190051701A1 VERTICAL CROSS-POINT MEMORY ARRAYS Public/Granted day:2019-02-14
Information query
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