Invention Grant
- Patent Title: High-electron-mobility transistor (HEMT)
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Application No.: US16032502Application Date: 2018-07-11
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Publication No.: US10553712B2Publication Date: 2020-02-04
- Inventor: Mayank Shrivastava
- Applicant: INDIAN INSTITUTE OF SCIENCE
- Applicant Address: IN Bangalore
- Assignee: INDIAN INSTITUTE OF TECHNOLOGY
- Current Assignee: INDIAN INSTITUTE OF TECHNOLOGY
- Current Assignee Address: IN Bangalore
- Priority: IN20171024695 20170712
- Main IPC: H01L29/739
- IPC: H01L29/739 ; H01L29/778 ; H01L21/768 ; H01L29/06 ; H01L23/31 ; H01L29/20

Abstract:
The present disclosure provides a superjunction based design for normally-OFF HEMT that has two key components: (i) a recessed high-K metal gate and (ii) a superjunction layer under the gate, which is embedded within the N-type GaN buffer layers and separated from recessed gate. Recess gate is to deplete the 2 DEG from the channel region (under the gate) when the transistor is under OFF state. The present disclosure provides a new, improved, efficient and technically advanced HEMT device which can provide higher breakdown voltage, when compared to designs available in the prior-art, without affecting the performance figure of merits. Further, the new HEMT device offers improved breakdown voltage as compared to ON-resistance trade-off, improved the short channel effects, improved gate control over channel, improved switching speed for a given breakdown voltage, and improved device reliability. Furthermore, the new HEMT device lowers gate-to-drain (miller) capacitance and is available at low cost.
Public/Granted literature
- US20190081164A1 A High-electron-mobility transistor (HEMT) Public/Granted day:2019-03-14
Information query
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