- Patent Title: Methods and apparatus for sequencing multiply-accumulate operations
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Application No.: US15988458Application Date: 2018-05-24
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Publication No.: US10572224B2Publication Date: 2020-02-25
- Inventor: Valavan Manohararajah
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Patent Capital Group
- Main IPC: G06F7/544
- IPC: G06F7/544

Abstract:
An integrated circuit may have specialized processing blocks that are configurable to operate as arithmetic operators that may implement, amongst other functions, multiplication and multiply-accumulation operations in a first mode. In a second mode, a sequencer circuit may provide data signals and control signals to the specialized processing blocks such that the specialized processing block operates as a signal processing device that handles signals in a given sequence. For example, the sequencer circuit may control the signal arrival at the specialized processing block and the configuration of the configurable circuitry in the specialized processing block. In certain embodiments, the sequencer circuit and the specialized processing block may implement finite impulse response (FIR) filters.
Public/Granted literature
- US20180349098A1 METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS Public/Granted day:2018-12-06
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