Invention Grant
- Patent Title: Symmetrical front-end chip for dual-pole antenna array
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Application No.: US16050112Application Date: 2018-07-31
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Publication No.: US10587052B2Publication Date: 2020-03-10
- Inventor: Samet Zihir , Tumay Kanar
- Applicant: Integrated Device Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Renesas Electronics America, Inc.
- Current Assignee: Renesas Electronics America, Inc.
- Current Assignee Address: US CA San Jose
- Agent Christopher P. Maiorana, PC
- Main IPC: H01Q21/00
- IPC: H01Q21/00 ; H01Q21/06 ; H04B1/44 ; H03F1/56 ; H03F3/19 ; H03G3/30 ; H03F3/24 ; H03F1/32 ; H03F3/195 ; H03F3/45 ; H03F3/68 ; H04B1/04 ; H04B1/18 ; H04B1/48 ; H03K21/10 ; H04B7/06 ; H01Q1/52 ; H01Q3/28 ; H01Q3/36 ; H01Q19/30 ; H03F1/02 ; H01Q1/48 ; H01Q1/22 ; H03H7/48 ; H04B1/401

Abstract:
An apparatus includes a package and a beam former circuit. The package may be configured to be mounted on an antenna array at a center of four antenna elements. Each antenna element may include a dual-pole antenna having a vertical feed and a horizontal feed. The beam former circuit may be (i) disposed in the package, (ii) have a plurality of pairs of ports, (iii) configured to generate a plurality of radio-frequency signals in the ports while in a transmit mode and (iv) configured to receive the radio-frequency signals at the ports while in a receive mode. Each pair of the ports is configured to be directly connected to a respective one of the antenna elements. All of the ports may be spatially routed into alignment with the vertical feeds and the horizontal feeds in a single conductive plane of the antenna array.
Public/Granted literature
- US20190089064A1 SYMMETRICAL FRONT-END CHIP FOR DUAL-POLE ANTENNA ARRAY Public/Granted day:2019-03-21
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