Invention Grant
- Patent Title: Programmable integrated circuits with in-operation reconfiguration capability
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Application No.: US16043035Application Date: 2018-07-23
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Publication No.: US10591544B2Publication Date: 2020-03-17
- Inventor: Dana How , Dinesh Patil , Arifur Rahman , Jeffrey Erik Schulz
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Treyz Law Group, P.C.
- Agent Tianyi He
- Main IPC: G06F11/20
- IPC: G06F11/20 ; G06F11/16 ; G01R31/3185 ; G06F11/18 ; G06F11/00 ; G01R31/28 ; H01L25/065

Abstract:
Integrated circuit packages with multiple integrated circuit dies are provided. A multichip package may include a master die that is coupled to one or more slave dies via inter-die package interconnects. A mixed (i.e., active and passive) interconnect redundancy scheme may be implemented to help repair potentially faulty interconnects to improve assembly yield. Interconnects that carry normal user signals may be repaired using an active redundancy scheme by selectively switching into use a spare driver block when necessary. On the other hand, interconnects that carry power-on-reset signals, initialization signals, and other critical control signals for synchronizing the operation between the master and slave dies may be supported using a passive redundancy scheme by using two or more duplicate wires for each critical signal.
Public/Granted literature
- US20190018063A1 PROGRAMMABLE INTEGRATED CIRCUITS WITH IN-OPERATION RECONFIGURATION CAPABILITY Public/Granted day:2019-01-17
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