Invention Grant
- Patent Title: Techniques and structure for forming thin silicon-on-insulator materials
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Application No.: US15728000Application Date: 2017-10-09
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Publication No.: US10600675B2Publication Date: 2020-03-24
- Inventor: Andrew M. Waite , Morgan D. Evans , John Hautala
- Applicant: Varian Semiconductor Equipment Associates, Inc.
- Applicant Address: US MA Gloucester
- Assignee: Varian Semiconductor Equipment Associates, Inc.
- Current Assignee: Varian Semiconductor Equipment Associates, Inc.
- Current Assignee Address: US MA Gloucester
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/311 ; H01L21/02 ; H01L27/12 ; H01J37/305 ; H01L21/3065

Abstract:
A method may include providing a silicon-on-insulator (SOI) substrate, the SOI substrate comprising an insulator layer and a silicon layer. The silicon layer may be disposed on the insulator layer, where the silicon layer comprises a first silicon thickness variation. The method may include forming an oxide layer on the silicon layer, where the oxide layer has a uniform thickness. The method may include selectively etching the oxide layer on the silicon layer, wherein the oxide layer comprises a first non-uniform oxide thickness. After thermal processing of the SOI substrate in an oxygen ambient, the non-uniform oxide thickness may be configured to generate a second silicon thickness variation in the silicon layer, less than the first silicon thickness variation.
Public/Granted literature
- US20190027396A1 Techniques and Structure for Forming Thin Silicon-on-Insulator Materials Public/Granted day:2019-01-24
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